CH483059A - Verfahren und Einrichtung zur Kanalfehlerkorrektur - Google Patents
Verfahren und Einrichtung zur KanalfehlerkorrekturInfo
- Publication number
- CH483059A CH483059A CH29469A CH29469A CH483059A CH 483059 A CH483059 A CH 483059A CH 29469 A CH29469 A CH 29469A CH 29469 A CH29469 A CH 29469A CH 483059 A CH483059 A CH 483059A
- Authority
- CH
- Switzerland
- Prior art keywords
- error correction
- channel error
- channel
- correction
- error
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
- G06F11/141—Saving, restoring, recovering or retrying at machine instruction level for bus or memory accesses
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C2029/0411—Online error correction
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
- Retry When Errors Occur (AREA)
- Hardware Redundancy (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US69779768A | 1968-01-15 | 1968-01-15 |
Publications (1)
Publication Number | Publication Date |
---|---|
CH483059A true CH483059A (de) | 1969-12-15 |
Family
ID=24802580
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CH29469A CH483059A (de) | 1968-01-15 | 1969-01-13 | Verfahren und Einrichtung zur Kanalfehlerkorrektur |
Country Status (10)
Country | Link |
---|---|
US (1) | US3564502A (de) |
JP (1) | JPS4842741B1 (de) |
BE (1) | BE725193A (de) |
CH (1) | CH483059A (de) |
DE (1) | DE1815666B2 (de) |
ES (1) | ES362337A1 (de) |
FR (1) | FR1604086A (de) |
GB (1) | GB1184160A (de) |
NL (1) | NL162761C (de) |
SE (1) | SE337712B (de) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3688274A (en) * | 1970-12-23 | 1972-08-29 | Ibm | Command retry control by peripheral devices |
US3721961A (en) * | 1971-08-11 | 1973-03-20 | Ibm | Data processing subsystems |
US3735362A (en) * | 1971-09-22 | 1973-05-22 | Ibm | Shift register interconnection system |
GB1434186A (en) * | 1972-04-26 | 1976-05-05 | Gen Electric Co Ltd | Multiprocessor computer systems |
US4225917A (en) * | 1976-02-05 | 1980-09-30 | Motorola, Inc. | Error driven interrupt for polled MPU systems |
US4149244A (en) * | 1976-06-07 | 1979-04-10 | Amdahl Corporation | Data processing system including a program-executing secondary system controlling a program-executing primary system |
US4207609A (en) * | 1978-05-08 | 1980-06-10 | International Business Machines Corporation | Method and means for path independent device reservation and reconnection in a multi-CPU and shared device access system |
US4244019A (en) * | 1978-06-29 | 1981-01-06 | Amdahl Corporation | Data processing system including a program-executing secondary system controlling a program-executing primary system |
US4205374A (en) * | 1978-10-19 | 1980-05-27 | International Business Machines Corporation | Method and means for CPU recovery of non-logged data from a storage subsystem subject to selective resets |
US4381540A (en) * | 1978-10-23 | 1983-04-26 | International Business Machines Corporation | Asynchronous channel error mechanism |
US4410942A (en) * | 1981-03-06 | 1983-10-18 | International Business Machines Corporation | Synchronizing buffered peripheral subsystems to host operations |
US4636942A (en) * | 1983-04-25 | 1987-01-13 | Cray Research, Inc. | Computer vector multiprocessing control |
US4603380A (en) * | 1983-07-01 | 1986-07-29 | International Business Machines Corporation | DASD cache block staging |
JPS60142418A (ja) * | 1983-12-28 | 1985-07-27 | Hitachi Ltd | 入出力エラ−回復方式 |
US4771378A (en) * | 1984-06-19 | 1988-09-13 | Cray Research, Inc. | Electrical interface system |
CA1228677A (en) * | 1984-06-21 | 1987-10-27 | Cray Research, Inc. | Peripheral interface system |
JPH0680492B2 (ja) * | 1984-09-29 | 1994-10-12 | 株式会社日立製作所 | エラー回復方法 |
US4703481A (en) * | 1985-08-16 | 1987-10-27 | Hewlett-Packard Company | Method and apparatus for fault recovery within a computing system |
US5303351A (en) * | 1988-12-30 | 1994-04-12 | International Business Machines Corporation | Error recovery in a multiple 170 channel computer system |
US5142638A (en) * | 1989-02-07 | 1992-08-25 | Cray Research, Inc. | Apparatus for sharing memory in a multiprocessor system |
JPH0776950B2 (ja) * | 1990-06-22 | 1995-08-16 | インターナショナル・ビジネス・マシーンズ・コーポレイション | データ処理方法及び装置 |
CA2154509A1 (en) * | 1994-10-03 | 1996-04-04 | Paul Peixoto Carreiro | Method and apparatus for automatic frame transmission on a channel to controller interface in a data processing system |
US5740406A (en) * | 1995-05-15 | 1998-04-14 | Nvidia Corporation | Method and apparatus for providing fifo buffer input to an input/output device used in a computer system |
US6339799B1 (en) * | 1998-10-29 | 2002-01-15 | International Business Machines Corporation | Method of repositioning an I/O device to a predetermined position to retry a program without knowledge of which part of the program caused the retry |
US6343335B1 (en) * | 1998-10-29 | 2002-01-29 | International Business Machines Corporation | System for repositioning an I/O device to a predetermined position to retry a program without knowledge of which part of the program caused the retry |
JP2000172624A (ja) * | 1998-12-07 | 2000-06-23 | Hitachi Ltd | 入出力処理システム |
-
1968
- 1968-01-15 US US697797A patent/US3564502A/en not_active Expired - Lifetime
- 1968-12-10 BE BE725193D patent/BE725193A/xx not_active IP Right Cessation
- 1968-12-13 GB GB59281/68A patent/GB1184160A/en not_active Expired
- 1968-12-16 FR FR1604086D patent/FR1604086A/fr not_active Expired
- 1968-12-19 DE DE19681815666 patent/DE1815666B2/de active Pending
-
1969
- 1969-01-06 NL NL6900173.A patent/NL162761C/xx not_active IP Right Cessation
- 1969-01-10 JP JP44001765A patent/JPS4842741B1/ja active Pending
- 1969-01-10 ES ES362337A patent/ES362337A1/es not_active Expired
- 1969-01-13 CH CH29469A patent/CH483059A/de not_active IP Right Cessation
- 1969-01-15 SE SE00471/69A patent/SE337712B/xx unknown
Also Published As
Publication number | Publication date |
---|---|
SE337712B (de) | 1971-08-16 |
BE725193A (de) | 1969-05-16 |
DE1815666B2 (de) | 1970-09-10 |
NL162761B (nl) | 1980-01-15 |
US3564502A (en) | 1971-02-16 |
GB1184160A (en) | 1970-03-11 |
ES362337A1 (es) | 1970-12-01 |
NL162761C (nl) | 1980-06-16 |
JPS4842741B1 (de) | 1973-12-14 |
FR1604086A (de) | 1971-07-05 |
NL6900173A (de) | 1969-07-17 |
DE1815666A1 (de) | 1969-08-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PL | Patent ceased |