CH389027A - Verfahren und Schaltanordnung zur Ein- und Ausgabe von binär-verschlüsselten Informationen - Google Patents

Verfahren und Schaltanordnung zur Ein- und Ausgabe von binär-verschlüsselten Informationen

Info

Publication number
CH389027A
CH389027A CH351960A CH351960A CH389027A CH 389027 A CH389027 A CH 389027A CH 351960 A CH351960 A CH 351960A CH 351960 A CH351960 A CH 351960A CH 389027 A CH389027 A CH 389027A
Authority
CH
Switzerland
Prior art keywords
binary
input
output
circuit arrangement
encrypted information
Prior art date
Application number
CH351960A
Other languages
English (en)
Inventor
Wilhelm Dipl-Phys Al Friedrich
Original Assignee
Olympia Werke Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Olympia Werke Ag filed Critical Olympia Werke Ag
Publication of CH389027A publication Critical patent/CH389027A/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/78—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/06—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using single-aperture storage elements, e.g. ring core; using multi-aperture plates in which each individual aperture forms a storage element
    • G11C11/06007—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using single-aperture storage elements, e.g. ring core; using multi-aperture plates in which each individual aperture forms a storage element using a single aperture or single magnetic closed circuit
    • G11C11/06014—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using single-aperture storage elements, e.g. ring core; using multi-aperture plates in which each individual aperture forms a storage element using a single aperture or single magnetic closed circuit using one such element per bit
    • G11C11/06021—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using single-aperture storage elements, e.g. ring core; using multi-aperture plates in which each individual aperture forms a storage element using a single aperture or single magnetic closed circuit using one such element per bit with destructive read-out
    • G11C11/06028—Matrixes
    • G11C11/06035—Bit core selection for writing or reading, by at least two coincident partial currents, e.g. "bit"- organised, 2L/2D, or 3D
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • H03K17/64—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors having inductive loads

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Shift Register Type Memory (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
  • Electronic Switches (AREA)
CH351960A 1959-07-15 1960-03-29 Verfahren und Schaltanordnung zur Ein- und Ausgabe von binär-verschlüsselten Informationen CH389027A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DEO6882A DE1099232B (de) 1959-07-15 1959-07-15 Schaltanordnung fuer einen Pufferspeicher

Publications (1)

Publication Number Publication Date
CH389027A true CH389027A (de) 1965-03-15

Family

ID=7350997

Family Applications (1)

Application Number Title Priority Date Filing Date
CH351960A CH389027A (de) 1959-07-15 1960-03-29 Verfahren und Schaltanordnung zur Ein- und Ausgabe von binär-verschlüsselten Informationen

Country Status (4)

Country Link
US (1) US3129411A (de)
CH (1) CH389027A (de)
DE (1) DE1099232B (de)
GB (1) GB946569A (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3274556A (en) * 1962-07-10 1966-09-20 Ibm Large scale shifter
US3332066A (en) * 1962-12-31 1967-07-18 Ibm Core storage device
US3360788A (en) * 1964-12-14 1967-12-26 Sperry Rand Corp Bi-directional current switch
US3505659A (en) * 1967-01-16 1970-04-07 Automatic Elect Lab Techniques for time sharing memory sense amplifiers using delay lines
US3634827A (en) * 1970-04-16 1972-01-11 Ibm Processing of multilayer weave design data
JPH05235782A (ja) * 1992-02-19 1993-09-10 Fujitsu Ltd 垂直データ・水平データ交換方法及び回路

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2899572A (en) * 1959-08-11 Three phase power supply
US2911621A (en) * 1952-06-02 1959-11-03 Rca Corp Bidirectional static magnetic storage
IT536780A (de) * 1954-06-16
BE546329A (de) * 1955-04-20
US2881333A (en) * 1955-09-23 1959-04-07 Robert H Pickard Transistorized counter
NL220449A (de) * 1956-09-04
US2843320A (en) * 1956-12-21 1958-07-15 Beckman Instruments Inc Transistorized indicating decade counter
US2895124A (en) * 1957-05-08 1959-07-14 Gen Dynamics Corp Magnetic core data storage and readout device
FR1194259A (de) * 1958-04-04 1959-11-09

Also Published As

Publication number Publication date
DE1099232B (de) 1961-02-09
GB946569A (en) 1964-01-15
US3129411A (en) 1964-04-14

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