CH377003A - Transistor et procédé de fabrication dudit transistor - Google Patents
Transistor et procédé de fabrication dudit transistorInfo
- Publication number
- CH377003A CH377003A CH8085059A CH8085059A CH377003A CH 377003 A CH377003 A CH 377003A CH 8085059 A CH8085059 A CH 8085059A CH 8085059 A CH8085059 A CH 8085059A CH 377003 A CH377003 A CH 377003A
- Authority
- CH
- Switzerland
- Prior art keywords
- transistor
- manufacturing
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/223—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/914—Doping
- Y10S438/919—Compensation doping
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US775164A US2956913A (en) | 1958-11-20 | 1958-11-20 | Transistor and method of making same |
Publications (1)
Publication Number | Publication Date |
---|---|
CH377003A true CH377003A (fr) | 1964-04-30 |
Family
ID=25103519
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CH8085059A CH377003A (fr) | 1958-11-20 | 1959-11-20 | Transistor et procédé de fabrication dudit transistor |
Country Status (3)
Country | Link |
---|---|
US (1) | US2956913A (fr) |
CH (1) | CH377003A (fr) |
GB (1) | GB878792A (fr) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL262701A (fr) * | 1960-03-25 | |||
US3098954A (en) * | 1960-04-27 | 1963-07-23 | Texas Instruments Inc | Mesa type transistor and method of fabrication thereof |
DE1250002B (de) * | 1960-11-04 | 1967-09-14 | International Business Machines Corporation, Armonk, NY (V St A) | I Diffusionsverfahren zum Herstellen einer Esaki Diode und nach diesem Verfahren hergestellte Esaki-Diode |
DE1160106B (de) * | 1960-11-11 | 1963-12-27 | Intermetall | Halbleiterverstaerker mit flaechenhaften pn-UEbergaengen mit Tunnelcharakteristik und Verfahren zum Herstellen |
US3225198A (en) * | 1961-05-16 | 1965-12-21 | Hughes Aircraft Co | Method of measuring nuclear radiation utilizing a semiconductor crystal having a lithium compensated intrinsic region |
US3173816A (en) * | 1961-08-04 | 1965-03-16 | Motorola Inc | Method for fabricating alloyed junction semiconductor assemblies |
DE1199897B (de) * | 1962-04-03 | 1965-09-02 | Philips Nv | Verfahren zur Herstellung einer Sperrschicht in einem n-leitenden Cadmiumsulfidkoerper |
NL298286A (fr) * | 1962-09-24 | |||
NL298006A (fr) * | 1962-12-07 | 1900-01-01 | ||
US3473093A (en) * | 1965-08-18 | 1969-10-14 | Ibm | Semiconductor device having compensated barrier zones between n-p junctions |
US3658606A (en) * | 1969-04-01 | 1972-04-25 | Ibm | Diffusion source and method of producing same |
JPS49108969A (fr) * | 1973-02-07 | 1974-10-16 | ||
JPS6011457B2 (ja) * | 1973-04-02 | 1985-03-26 | 株式会社日立製作所 | デイポジシヨン法 |
US3897286A (en) * | 1974-06-21 | 1975-07-29 | Gen Electric | Method of aligning edges of emitter and its metalization in a semiconductor device |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL196136A (fr) * | 1954-04-01 | |||
NL207910A (fr) * | 1955-06-20 |
-
1958
- 1958-11-20 US US775164A patent/US2956913A/en not_active Expired - Lifetime
-
1959
- 1959-11-16 GB GB38792/59A patent/GB878792A/en not_active Expired
- 1959-11-20 CH CH8085059A patent/CH377003A/fr unknown
Also Published As
Publication number | Publication date |
---|---|
US2956913A (en) | 1960-10-18 |
GB878792A (en) | 1961-10-04 |
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