CA996268A - Statistical logic test system having a weighted random test pattern generator - Google Patents

Statistical logic test system having a weighted random test pattern generator

Info

Publication number
CA996268A
CA996268A CA158,256A CA158256A CA996268A CA 996268 A CA996268 A CA 996268A CA 158256 A CA158256 A CA 158256A CA 996268 A CA996268 A CA 996268A
Authority
CA
Canada
Prior art keywords
pattern generator
weighted random
statistical logic
test pattern
test system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA158,256A
Other languages
English (en)
Other versions
CA158256S (en
Inventor
Robert G. Carpenter
Maurice T. Mcmahon (Jr.)
Eric Lindbloom
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of CA996268A publication Critical patent/CA996268A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/31813Test pattern generators
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3183Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318385Random or pseudo-random test pattern

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
CA158,256A 1971-12-13 1972-12-05 Statistical logic test system having a weighted random test pattern generator Expired CA996268A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US20746071A 1971-12-13 1971-12-13

Publications (1)

Publication Number Publication Date
CA996268A true CA996268A (en) 1976-08-31

Family

ID=22770638

Family Applications (1)

Application Number Title Priority Date Filing Date
CA158,256A Expired CA996268A (en) 1971-12-13 1972-12-05 Statistical logic test system having a weighted random test pattern generator

Country Status (6)

Country Link
US (1) US3719885A (de)
JP (1) JPS5215497B2 (de)
CA (1) CA996268A (de)
DE (1) DE2256135C3 (de)
FR (1) FR2163442B1 (de)
GB (1) GB1363786A (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5261797U (de) * 1975-10-31 1977-05-06
JPS5261798U (de) * 1975-10-31 1977-05-06
JPS52160646U (de) * 1976-05-31 1977-12-06
DE2746743C2 (de) * 1977-10-18 1986-04-17 Ibm Deutschland Gmbh, 7000 Stuttgart Verfahren und Anordnung zur computergesteuerten Erzeugung von Impulsintervallen
DE2829709C2 (de) * 1978-07-06 1984-02-23 Ibm Deutschland Gmbh, 7000 Stuttgart Verfahren und Anordnung zur Erzeugung zeitlich unmittelbar aufeinanderfolgender Impulszyklen
FR2553540B1 (fr) * 1983-10-13 1986-01-03 Centre Nat Rech Scient Dispositif de test aleatoire pour circuits logiques, notamment microprocesseurs
US4715034A (en) * 1985-03-04 1987-12-22 John Fluke Mfg. Co., Inc. Method of and system for fast functional testing of random access memories
US4688223A (en) * 1985-06-24 1987-08-18 International Business Machines Corporation Weighted random pattern testing apparatus and method
US4687988A (en) * 1985-06-24 1987-08-18 International Business Machines Corporation Weighted random pattern testing apparatus and method
US5043988A (en) * 1989-08-25 1991-08-27 Mcnc Method and apparatus for high precision weighted random pattern generation
DE69126199T2 (de) * 1991-02-21 1997-10-16 Ibm Integrierter Schaltkreis mit eingebautem Selbsttest für die Erkennung logischer Fehler
JP2584172B2 (ja) * 1991-08-23 1997-02-19 インターナショナル・ビジネス・マシーンズ・コーポレイション デイジタル試験信号発生回路
US5412665A (en) * 1992-01-10 1995-05-02 International Business Machines Corporation Parallel operation linear feedback shift register
US5394405A (en) * 1992-04-24 1995-02-28 International Business Machines Corporation Universal weight generator
US5414716A (en) * 1993-09-22 1995-05-09 Mitsubishi Electronic Research Laboratories, Inc. Weighting system for testing of circuits utilizing determination of undetected faults
US5968194A (en) * 1997-03-31 1999-10-19 Intel Corporation Method for application of weighted random patterns to partial scan designs
DE10127690A1 (de) * 2001-06-08 2002-12-12 Infineon Technologies Ag Verfahren zur Erzeugung von Testmustern zur Prüfung von elektrischen Schaltungen
US6918098B2 (en) * 2002-07-16 2005-07-12 Hewlett-Packard Development Company, L.P. Random code generation using genetic algorithms
US7197721B2 (en) * 2002-12-17 2007-03-27 Intel Corporation Weight compression/decompression system
US8527921B2 (en) * 2008-03-31 2013-09-03 Synopsys, Inc. Constrained random simulation coverage closure guided by a cover property
US8412722B2 (en) * 2011-02-08 2013-04-02 International Business Machines Corporation Upload manager for use in a pattern matching accelerator
US8402003B2 (en) * 2011-02-08 2013-03-19 International Business Machines Corporation Performance monitoring mechanism for use in a pattern matching accelerator
US8447749B2 (en) * 2011-02-08 2013-05-21 International Business Machines Corporation Local results processor for use in a pattern matching accelerator

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3614608A (en) * 1969-05-19 1971-10-19 Ibm Random number statistical logic test system
US3636443A (en) * 1970-10-29 1972-01-18 Ibm Method of testing devices using untested devices as a reference standard

Also Published As

Publication number Publication date
FR2163442A1 (de) 1973-07-27
FR2163442B1 (de) 1974-08-19
JPS4873080A (de) 1973-10-02
DE2256135A1 (de) 1973-06-20
GB1363786A (en) 1974-08-14
US3719885A (en) 1973-03-06
DE2256135C3 (de) 1981-10-15
DE2256135B2 (de) 1980-12-11
JPS5215497B2 (de) 1977-04-30

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