CA2921737A1 - Micro device integration into system substrate - Google Patents

Micro device integration into system substrate Download PDF

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Publication number
CA2921737A1
CA2921737A1 CA2921737A CA2921737A CA2921737A1 CA 2921737 A1 CA2921737 A1 CA 2921737A1 CA 2921737 A CA2921737 A CA 2921737A CA 2921737 A CA2921737 A CA 2921737A CA 2921737 A1 CA2921737 A1 CA 2921737A1
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CA
Canada
Prior art keywords
dielectric layer
layer
micro device
micro
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA2921737A
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French (fr)
Inventor
Reza Rc Chaji
Ehsanallah Fathi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
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Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CA2921737A priority Critical patent/CA2921737A1/en
Priority to US15/442,293 priority patent/US20170215280A1/en
Publication of CA2921737A1 publication Critical patent/CA2921737A1/en
Priority to US17/222,506 priority patent/US20210243894A1/en
Abandoned legal-status Critical Current

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    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01—ELECTRIC ELEMENTS
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination

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Abstract

Post-processing steps for integrating of micro devices into system (receiver) substrate or improving the performance of the micro devices after transfer. Post processing steps for additional structures such as reflective layers, fillers, black matrix or other layers may be used to improve the out coupling or confining of the generated LED light. Dielectric and metallic layers may be used to integrate an electro-optical thin film device into the system substrate with transferred micro devices. Color conversion layers may be integrated into the system substrate to create different outputs from the micro devices

Description

MICRO DEVICE DEFINITION AND INTEGRATION
FIELD OF THE INVENTION
[0001] This invention is related to the system substrate assisted bonding of transferred micro devices. A dual functional pad structure on the system substrate for transfer and integration of micro devices and biasing them in normal operation is disclosed.
BRIEF SUMMARY
[0001] In one embodiment of this disclosure, a deformable bonding layer between system substrate and micro devices to accommodate the height difference in micro devices.
[0002] In one embodiment, the bonding layer is current curable layer.
[0003] One embodiment of this disclosure is a transfer mechanism for holding devices from donor substrate to system substrate in which the bonding layer is cured selectively by applying current to the bonding layer
[0004] in one case, the current is applied by circuit in the system substrate.
in one embodiment, the circuit applying current for curing the bonding layer is partially or fully shared with the circuit driving the micro devices in operation mode
[0005] In one embodiment, the curing current flows through micro device and system substrate
[0006] In another embodiment, the curing current flows between to contact in the system substrate.
[0007] The following disclosure describes a dual functional pad structure for transfer and integration of micro devices from array of micro devices on a donor substrate to the contact pads on a system substrate by using an electrostatic force. Micro devices on the donor substrate are brought in close contact (full or proximity contact) with the corresponding contact pads on the receiver substrate. Application of electrostatic force between the contact pads and micro devices, allows transfer of micro devices from the donor substrate to the system one. In an embodiment, dielectric layer on top of the contact pad (or on the micro devices) is used for generating electrostatic force. This layer is formed on top of the contact pad or the micro device, which may be connected to the driving circuits, on the system substrate to form a landing pad. Here dielectric layer is used for two purposes, one for generating the electrostatic force for transfer of the micro devices, and one for using as a contact pad to bias the micro device during normal operation. In the latter case, after the micro device transfer process, dielectric properties of the layer can be modulated to be conductive for biasing the transferred micro devices.
[0008] A system substrate having array of pad structures consist of conductive layer and dielectric layer where dielectric layer can be modulated to be a conductive layer.
[0009] A micro device structure on donor substrate consist of functional layers, at least a contact pad and a dielectric layer covering the contact pad that can be modulated to form a conductive layer.
[0010] In one embodiment the dielectric layer creates electrostatic force for attracting micro devices during transfer phase
[0011] In another embodiment, the dielectric layer property changes to conductive layer during normal operation to couple the circuit in the system substrate to the micro device.
[0012] In one embodiment, doping layer is used to change the property of electrostatic layer to a conductive layer.
[0013] In one embodiment, the dielectric layer is changed to conductive layer by the means of laser breakdown.
[0014] In another embodiment, the micro device is coupled into system substrate after transfer wherein the dielectric layer is removed partially or fully between the pads and the micro devices.
[0015] In one embodiment, the dielectric layer is removed by the means of mechanical force.
[0016] In another embodiment, the dielectric layer is removed by the means of thermal force.
[0017] In an embodiment, selective transfer of micro devices is done by using the electrostatic force.
[0018] In an embodiment, dielectric layer is formed on top of the contact pad on the system substrate before the micro device transfer step.
[0019] In an embodiment, dielectric layer is used to generate electrostatic force.
[0020] In another embodiment, properties of dielectric layer is modulated after the micro device transfer to form a conductive layer and be used as a contact pad.
[0021] In an embodiment, dielectric layer and micro device are biased to create an electrostatic force for transfer of micro devices.
[0022] In an embodiment, top surface of the dielectric layer is doped before the micro device transfer process. After the transfer process, dielectric layer is thermally annealed allowing diffusion of dopant into the dielectric layer forming a conductive layer that acts as a contact pad.
[0023] In another embodiment, thin layer at the bottom side of the dielectric layer is doped and top side is a highly resistive layer with very small impurity. Annealing step results diffusion of dopants from the bottom to the top side of the dielectric layer forming a conductive layer that acts as a contact pad.
[0024] In an embodiment, micro device surface that requires to be electrically connected to the contact pad is doped. After the micro device transfer step, annealing step allows diffusion of dopants from the micro device surface to the dielectric layer making this layer conductive.
[0025] In an embodiment, dielectric layer is exposed to the laser beam. Laser beam results breakdown of the dielectric layer and shorting the micro device electrode and contact pad.
[0026] In another embodiment, laser beam can be used to melt the dielectric layer and the metal contact allowing diffusion of the metal or dopant into the dielectric layer and shorting contact pad and micro device electrode.
[0027] In some embodiments, laser beam can be applied to the dielectric layer through the transparent electrode or contact pad from the top or bottom side or through the sidewalls of the micro device.
[0028] In an embodiment, soft dielectric material can be used as a dielectric interconnect layer.
Following the micro device transfer process, mechanical or thermal force can be used to remove the dielectric material between the contact pad and micro device electrode.
[0029] In another embodiment, dielectric layer with metal nanoparticles can be used to form a conductive layer between the substrate contact pad and micro device electrode.
[0030] In an embodiment, soft dielectric layer can be used to uniforms the surface of the micro devices with various heights on the donor or carrier substrate in the vicinity of the system substrate, allowing a transfer of micro devices with different heights to the system substrate.
BRIEF DESCRIPTION OF THE DRAWINGS
[0002] The foregoing and other advantages of the disclosure will become apparent upon reading the following detailed description and upon reference to the drawings.
[0003] FIG. 1 shows a donor substrate and a receiver substrate with bonding element formed on each contact pads of the receiver substrate.
[0004] FIG. 2 shows an aligned donor substrate and receiver substrate with a current source connected to one of the contact pads on the system substrate and the donor substrate.
[0005] FIG. 3 shows a donor substrate and a receiver substrate with a transferred and bonded micro device on the receiver substrate.
[0006] FIG. 4 shows a system substrate with contact pads having two electrically isolated bonding elements and a current source connecting to these elements.
[0007] FIG. 5 shows a donor substrate and a receiver substrate with bonding element formed on each micro devices on the donor substrate.
[0008] FIG. 6 shows a system substrate with contact pads having two electrically isolated bonding elements separate circuitries for the bonding elements and driving contact pads.
[0009] FIG. 7 shows a system substrate with bonding elements which transform to the driving contact pads after curing. Two switches control the curing and driving functions.
[0010] FIG. 8 shows a system substrate with bonding elements which transform to the driving contact pads after curing. The same circuitry controls the curing and driving functions.
[0011] FIG. 9 shows a system substrate connection scheme with bonding elements which is connected to the individual pixel circuit for the vertical current curing configuration.
[0012] FIG. 10 shows a system substrate connection scheme with bonding elements which is connected to the individual pixel circuit for the lateral current curing configuration.
[0013] FIG 11 is a block diagram showing process flow of transferring micro devices.

[0014] FIG 12A is a cross sectional view of an array of micro devices on the donor substrate and contact pads on the acceptor one.
[0015] FIG 128 is a cross sectional view of donor and acceptor substrates in which electrostatic force is applied.
[0016] FIG 12C is a cross sectional view of transferred micro device to the system substrate.
[0017] FIG 13A is a process flow of modifying dielectric layer to form a conductive layer by doping top surface of the dielectric layer with dopants.
[0018] FIG 138 is a cross sectional view of the system substrate with dielectric layer in which process of doping top surface of dielectric layer to form a conductive layer is demonstrated.
[0019] FIG 13C shows the process for diffusion of dopant through the dielectric layer with thermal annealing.
[0020] FIG 13D is a block diagram showing process flow of modifying dielectric layer to form a conductive layer by doping bottom surface of the dielectric layer with dopants.
[0021] FIG 14A shows process flow of creating conductive interlayer by doping surface of the micro device.
[0022] FIG 148 shows surface doping of the micro devices.
[0023] FIG 14C shows transferred surface doped micro devices and annealing step for dopant penetration from the micro device into the dielectric layer.
[0024] FIG 15 shows process flow of modifying electrical properties of the dielectric layer with laser exposure.
[0025] FIG 16A is a cross sectional view of transferred micro device to the system substrate.
[0026] FIG 168 shows laser exposure of micro device from sidewalls.
[0027] FIG 17 is a block diagram showing process flow of micro device transfer using soft material as a dielectric layer.
[0028] FIG 18 is a cross sectional view of transferred micro device on top of the soft dielectric layer in which mechanical stress is applied.

[0029] FIG 19 is a cross sectional view of formed soft dielectric layer between the insulator layers on the system substrate.
[0030] FIG 20A is a process flow diagram of transferring patterned soft dielectric layer to the contact pads by stamping technique.
[0031] FIG 20B is schematic illustration of forming patterned soft dielectric layer on the contact pads by stamping method.
[0032] FIG 20C is schematic illustration of forming patterned soft dielectric layer on the contact pads by using patterned stamper.
[0033] FIG 21A shows a cross sectional view of the system substrate with the formed dielectric with metal nanoparticles layer.
[0034] FIG 21B is a cross sectional view of transferred micro device on top of the dielectric with metal nanoparticles layer.
[0035] FIG 21C shows aggregated metal nanoparticles forming conductive layer between the contact pad and micro device electrode by mechanical or thermal stress.
[0036] FIG 22A is a cross sectional view of system substrate and micro devices with different heights on the donor substrate.
[0037] FIG 22B shows process of transferring micro devices with different heights to the system substrate.
DETAILED DESCRIPTION
[0038] Transferring micro (nano) devices 103 into system substrate 100 offers limitless opportunity for developing high performance systems on panel (e.g. display, multi sensing platform, etc.). However, the transfer mechanism is prone to misalignment and also height difference in the micro devices.
[0039] This invention is using a deformable bonding layer between the pads in system substrate 100 and micro devices 103. Since the bonding layer can be deformed to accommodate different height in micro devices 103. In addition, the bonding layer can cover most of the landing area 106 and so relaxing alignment accuracy between donor substrate 101 and system substrate 100.
[0040] In one embodiment a deformable bonding layer between system substrate and micro devices is used to accommodate the height difference in micro devices.
[0041] In one aspect of the invention, the bonding layer is current curable.
[0042] In one embodiment of the invention, a transfer mechanism is used for holding devices from donor substrate to system substrate where the bonding layer is cured selectively by applying current to the bonding layer. Here, either the current is applied selectively or the bonding layer is applied selectively or both.
[0043] In one aspect of the invention the current is applied by circuit in the system substrate 100.
[0044] In another aspect of the invention, the circuit applying current is partially or fully shared with the circuit driving the micro devices in operation mode. where operation mode can be different for different type of micro devices. For example for micro-LED
devices, operation mode is where the device generate lights based on driving circuit output. In another example, for micro-sensor device, the operation mode is where device generate a signal (e.g. charge current, voltage, impedance, etc) based on a stimulating input signals.
[0045] In one aspect of the invention, the curing current flows through micro device and system substrate.
[0046] In another aspect of the invention, the curing current flows between to contact in the system substrate.
[0047] In one embodiment shown in FIG 1, system substrate 100 with contact pads 101 is aligned with a donor substrate 102 with an array of micro devices 103. Each micro device 103 has at least one contact pad 104. Micro device 103 can be smaller, larger or the same size as bonding layer 105.
[0048] Still referring to FIG 1, bonding layer 105 may be formed on contact pads 101.
Bonding material 105 may be an adhesive layer, promote bonding of micro device 103 to the contact pad 104. In one case, the curing improves the conductivity of the bonding layer 105 and at the same time hold the micro device into system substrate 100. In another case, upon curing the bonding layer 105, this layer may transform from a non-conductive to a conductive material.ln one aspect of this invention, the bonding layer is curable with electrical current.

Here, the bonding layer 105 has conductive nanoparticles. The current passing through the bonding layer 105 fuess the nanoparticles together.
[0049] Referring to FIG 2, in one embodiment, selective current through system substrate 100 is applied to the selected pads after the system substrate and donor substrate 102 are aligned bonding layers. The current selectively cures the selected bonding layers 107 and the selected micro devices are transferred to the system substrate. In another the bonding layer is applied selectively to the selected pads. As a result, curing the bonding layer can be global although selective curing as described will work as well.
[0050] In another embodiment, the micro devices 103 are transferred to the system substrate 100 using other selective transfer techniques (e.g. substrate assisted transfers or pick-and-place techniques). In this case, the bonding layer can be also part of the transfer mechanism. Here, during transfer, the bonding layer can be dielectric and so that a voltage on pad can act as receiver electrostatic force. After transfer, the current flowing through the bonding layer can cure the bonding layer 105 and turn it to a conductive layer. As shown in FIG
3, After transferring micro device 103 to the system substrate 100, a current source is used to cure the bonding layer 105 by passing the electrical current through the micro device and the bonding layer 105. At the beginning of the process, bonding layer 105 resist to the flow of the current which cause the self heating of this layer. As the curing process continues, bonding layer 105 resistance decreases. Upon the completion of the curing process, bonding layer 105 transforms to a conductive inter-layer between contact pad 101 and the micro device electrode 104. In one example, the bonding layer material may be an epoxy resin with conductive nanoparticles or carbon nanotubes. The nanoparticle elements are separated and suspended in the epoxy resin which results in a high resistance for this material. Upon current flow, local welding causes the nanoparticles to joint and at the end, to transform the material to a conductive layer.
[0051] Referring to FIG 4, In another embodiment, the contact pad 402 may be designed to have two separated conductive elements 401a and 401b. In this case, the bonding layer 105 may be formed between conductive elements 401a and 401b. Here, curing is done by flowing a current between these two conductive elements and independent from the micro device.
[0052] Alternatively, as shown in FIG 5, bonding layer 105 may be formed on the top of the micro devices 104 (or system substrate pad) using methods such as but not limited to stamping, printing or deposition and patterning.
[0053] In all above mentioned embodiments, bonding layer may be formed only for the selected micro devices that are transferred.
[0054] In all above mentioned embodiments, the current source may be DC or an AC
current.
[0055] In all above mentioned embodiments, a voltage source may be used to cure the bonding layer.
[0056] In one embodiment shown in FIG 6, the contact pad 101 and bonding element 105 are separated. Driving circuit 602 is connected to the contact pad and drives the micro device after bonding to the system substrate. Sub-circuit 603 is connected to the bonding element and the switch 604 is closed for selected micro devices during the bonding process. Here, different shape, structure or orientation.
[0057] In another embodiment, referring to FIG 7, bonding element and the contact pad 701 are the same. During the bonding process both switches 702 and 703 may be connected while after bonding switch 702 or 703 may connect the micro device to the electronic circuit of the system substrate.
[0058] In another embodiment, shown in FIG 8, the same system substrate pixel circuitry may be used both for bonding and pixel driving.
[0059] Referring to FIG 9, each contact pad 902 on the system substrate may be connected to the individual pixel circuit 901. The bonding element on the contact pads is cured after transferring the micro device and flowing current through the contact pad 902 and the micro device. One can cure any array of micro devices or any individual micro device using signal columns and rows 903 and 904. This may be important for cases where defective micro devices should not be bonded to the system substrate. After the integration process is done, the pixel is used to program the pixel for operation mode.
[0060] Alternatively, referring to FIG 10, in a similar structure as the one explained using FIG 9, the bonding element is cured by passing current through contact pads elements 1001A

=
and 1001B after closing the switch 1002 connected to the bias 1003. This configuration allows for a lateral current curing of the bonding elements. After the integration and other steps is done, the switches are configured so that the circuit programs the micro device for operation mode. In one case, the two contact pads are shorted together and coupled to the circuit. In another case, one of the contact pads is floating while the other one is coupled to the circuit.
[0061] In this description, "system" and "receiver" substrate are used interchangeably.
[0062] In this description, the term "device" and "micro device" are used interchangeably.
[0063] In this description, the term "donor" and "carrier" substrate are used interchangeably.
[0064] The following is a detailed description of various exemplary embodiments in accordance with the invention related to the dual functional pad structure on the system substrate for transfer and integration of micro devices. In an embodiment, the dielectric layer is formed on top of the contact pad to create a landing pad. Landing pads and micro devices are biased to generate electrostatic force for selective or global transfer of micro devices. After the micro device transfer step, dielectric properties of the dielectric layer is modulated to be a conductive layer. In one embodiment, doping dielectric layer and thermal annealing forms a conductive layer that act as a contact pad. In another embodiment, using laser beam allows breakdown of the dielectric layer, melting metal electrode and/or dielectric layer resulting formation of conductive layer. In an embodiment, using soft dielectric layer and subsequent heating and/or mechanical force removes fully or partially the dielectric layer between the contact pad and micro device electrode providing direct electrical connection between them. In another aspect of the embodiment, using soft dielectric layer allows transfer of the micro devices with different heights.
[0065] For a sake of clarity, in this description various terms are used to refer to a specific structure or example related to the inventions and it is not intended to limit the scope of this disclosure.
[0066] FIG 11 shows process flow of transfer and integration of micro devices from the donor substrate to the acceptor substrate.
[0067] Referring to FIG 11, block 2000, the first step is the fabrication of micro devices.
[0068] The next step, block 2002, is preparation of micro devices for transfer process. This process may be a combination of several steps. In this step, bonding between the micro devices and native substrate may be weaken by any appropriate method. In addition, micro devices may be transferred to the temporary substrate.
[0069] The next step, block 2004, is the formation of dual function dielectric layer on top of the contact pad on the system substrate by various methods. Etching step may also be employed to form dielectric layer on top of the contact pad.
[0070] The next step, block 2006, is the transfer process in which micro devices are transferred from the donor substrate to the acceptor one with the electrostatic force. Here the dielectric layer act as normal dielectric and create electrostatic force in combination with the contact pad.
[0071] After the micro device transfer step, referring to block 2008, several post processing steps such as cleaning, planarization, formation of additional layer, etc. may be employed on the system substrate.
[0072] After that the dielectric property is changed to couple the contact pads to the micro device at step 2010.
[0073] Further post processing steps 2012 such as deposition of electrode, light confinement, and other process can be performed.
[0074] Referring to FIG 12A, micro devices 2104 are attached to donor substrate 2102.
System substrate 2100 contains array of contact pads 2106. Dual function dielectric layer 2108 is formed on top of contact pad 2106 by various methods. Additional steps including patterning and etching may be employed to remove the dielectric layer from the unwanted area. Here, dual function pad structure is a combination of conductive contact pad and dielectric layer on top of it.
[0075] In an embodiment, attraction force between the landing pad and micro device is an electrostatic force. Referring to FIG 12B, array of micro devices are attached to donor substrate 2102. Contact pads on the acceptor substrate are connected to a voltage source. Here, voltage bias can be applied to all pads at the same time or to the desired individual pad for selective transfer purpose as it is shown in FIG 123. Donor substrate 2102 with attached micro devices and system substrate are brought together so that surface of the micro devices contacts to the landing pad. Differential potential in the dielectric layer creates an attractive electrostatic force, which pulls the micro device toward the system substrate. Referring to FIG
12C, separating the donor substrate from the system substrate detaches the micro device from the donor substrate.
[0076] Dielectric layer 2108 between the contact pad and micro device is insulator and prevents electrical biasing of the micro device during normal operation.
Referring to process 2010, one can modulate the dielectric properties of this layer to make it conductive in order to electrically connect the micro device to the contact pad for operation biasing.
[0077] In one embodiment, one can partially dope the dielectric layer during process 2004 and modulate its dielectric properties to conductive in process 2010.
[0078] FIG 13A shows process flow for modifying dielectric layer to form a conductive layer by doping top surface of the dielectric layer with dopants.
[0079] Referring to FIG 13A, process 2004 is a combination of two steps 2200 and 2202.
The first step is a formation of the dielectric layer on the receiver substrate. This step may be done with variety of methods such as deposition, stamping and spin coating, etc. Additional steps such as patterning and etching steps may be required to remove the dielectric layer from the unwanted area. At the end of this process, dielectric layer is formed on top of the contact pad. The next step shown in block 2202 is doping top surface of the dielectric layer to form a highly doped surface. The third and fourth steps shown in block 2006 and 2008 are the transfer of the micro device from the donor substrate to the receiver substrate and post processing step. The next step, process 2010, is modulation of dielectric layer to conductive layer, which is a thermal annealing of the dielectric layer. This will allow diffusion of dopants into the dielectric layer making this layer conductive.
[0080] Referring to FIG 138, prior to the micro device transfer, top side of the dielectric film is doped with dopants by various techniques for example ion bombardment method to form highly doped layer 2204. In case of ion bombardment method, dopant concentration, energy of doping, and uniformity of doping profile can be controlled precisely. In an embodiment, one can form dielectric layer on top of the system substrate followed by doping 2206 of the entire surface and subsequent etching of this layer to selectively form dielectric layer on top of the contact pads. In another embodiment, one can form dielectric layer on the system substrate followed by an etching step and then a doping step to dope surface of the dielectric layer. Prior to the doping process in the latter case additional steps such as applying photoresist and patterning may be employed to create a mask for prevention of doping of unwanted area on the system substrate. Wide variety of dopants can be used in order to dope the top layer of the dielectric layer. Dopant includes but not limited to boron, phosphorus, indium, arsenic, antimony, gold, aluminum, Si, Ge, titanium, chromium.
[0081] Referring to FIG 13C, following the transfer of micro device, thermal annealing step 2204 at elevated temperature is used to bond the top surface of doped dielectric layer to the micro device electrode and in the meantime allow diffusion of dopant into the dielectric layer forming a conductive layer. Conductive layer connects the contact pad on the receiving substrate to the micro device electrode. In this particular design, dielectric layer 2108 can be made of an organic/inorganic materials, semiconductors and polymers. Examples are silicon oxide, silicon nitride, polyamide and organic polymers and small molecules organic materials.
Materials can be deposited by various methods such as sputtering, CVD, PECVD, sol-gel, spin coating, inkjet printing and thermal evaporation techniques. Dielectric thickness is within a range of tens of nanometers to micrometers. For sintering the dielectric layer, depending on the material that is used the micro device can be heated from 50 c to 600 c enabling annealing of this layer and dopant diffusion through the film.
[0082] In another embodiment, referring to the process flow steps shown in FIG
13D, bottom side of the dielectric layer is doped with the dopant. Here, formation of dual function dielectric layer on the contact pads, process 2004, is a combination of three steps. The first step is a formation of thin dielectric layer on the receiver substrate. The next process, block 2212, is doping the thin dielectric layer. The third step, block 2214 is formation of highly resistive low impurity second dielectric layer on top of the doped layer. Here, patterning and etching steps for removal of the dielectric layer from the unwanted area can be employed at any stage depending on the dielectric layer formation method, before the micro device transfer process.
Following the micro device transfer step, subsequent sintering of the dielectric layer, process 2010, allows diffusion of dopant from the bottom side of the layer to the top side and modulation of dielectric layer to conductive layer.
[0083] In another embodiment, prior to the micro device transfer, side of the micro device (e.g. either top or bottom side), which requires to be connected to the contact pad is doped first and then the micro device is transferred to the system substrate. FIG
14A shows the process flow of transferring the surface doped micro devices to the system substrate. Similar to the previous process flows, the dielectric layer is formed on the receiver substrate on top of the contact pad. During process 2300, surface of the micro device that requires to be attached to the landing pad is doped by an appropriate method. Referring to FIG 1413, doping 2206 creates highly doped surface 2302 on micro devices. During process 2006, micro devices are transferred to the system substrate. After the micro device transfer step, during process 2010, thermal annealing 2208 allows penetration of dopants from the surface of micro device into the dielectric layer. Referring to FIG 14C, annealing step also allows diffusion of the penetrated dopants through the dielectric layer. One can also form a very thin dielectric layer on the micro device acting as a protective layer and dope the layer instead of doping surface of the micro device directly to prevent any damage that might be imposed on the micro device surface during doping process.
[0084] In an embodiment, another method to change dielectric layer to conductive layer is to expose this layer to the laser beam. FIG 15 shows process flow of modifying dielectric layer to form a conductive layer by a laser exposure. The first step similar to the previous process is the formation of dielectric layer on the receiver substrate. The second step is the transfer of micro devices on top of the dielectric layer. The last step is laser exposure of the dielectric layer.
[0085] Laser beam exposure results breakdown of the dielectric layer (i.e.
insulator) and shorting the contact pad and device electrode. One can also use laser as a heating source melting the dielectric layer. In another embodiment, laser beam may be used to heat the metal contact and melt the contact allowing diffusion of metal ions into the dielectric layer or promoting reaction of metal with the dielectric layer. At least one contact, either micro device electrode or receiving substrate contact pad requires to be transparent allowing a penetration of laser into the dielectric layer. FIG 16A shows cross sectional view of the structure in which laser 2500 is exposed to the dielectric layer from the top or bottom side perpendicular to the micro device. Transparent electrode may be made from a thin metal film or transparent conductive oxide. Highly resistive dielectric film without impurity is used for the dielectric interlayer. Laser beam wavelength can be chosen in a way so that it can be absorbed by the dielectric material. In addition, power, beam diameter and exposure pulse are defined to precisely control the process and preventing damage of the other layers.
Dielectric layer can be formed from wide variety of organic and inorganic materials such as Si02, SiN, etc. Metal contact may be made from aluminum, tungsten, molybdenum, etc. Reflective metal on the contact pad or micro device electrode can be also used as a protective layer to prevent damage of the underlying layers.
[0086] Referring to FIG 16, in an embodiment, in the case of two metal reflective electrodes on each side of the dielectric layer (e.g. contact biasing pad 2106 and micro device electrode 2502) in which the laser beam is blocked when is exposed perpendicular to the surface of electrodes, light confinement structure 2504 may be used to reflect the laser beam 2500 and direct it to the dielectric layer. Light confinement structure may be a combination of several different layers and materials. The top surface of light confinement structure is made from highly reflective metal 2506. Incident laser beam on the light confinement structure, where reflective metal presents, is reflected toward the sidewalls of the micro device. Reflected laser beam is absorbed by dielectric layer resulting a modification of its electrical properties.
Here, light confinement structure may be made before transferring the micro devices or after the transfer process.
[0087] In an embodiment, mechanical or thermal force may be used to remove partially or fully the dielectric layer to provide electrical connection between the contact pad and micro device electrode.
[0088] In an embodiment, soft material may be used to form a dielectric layer for landing pad. The soft dielectric layer can be made from organic or inorganic materials such as polymers and polyimide, etc. Here soft materials represents any materials that can be easily modified or deformed by a mechanical or thermal force such as gels and polymers. Depending on the material specific characteristics, variety of methods such as thermal evaporation, spin coating, inkjet printing, stamping, spray coating, etc. can be used to form the dielectric layer.
[0089] FIG 17 shows process flow of the formation of soft dielectric layer and subsequent post processing steps for removing this layer. Referring to FIG 17 process 2600, first step is preparation of substrate such as cleaning steps for removal of residuals and impurities on top of the surface of the system substrate allowing a better and stronger attachment of the dielectric layer to the surface. During process 2602, dielectric layer from soft material is formed by employing a proper method on top of the system or receiver substrate.
Afterwards, referring to step 2604, the formed dielectric layer is patterned to remove the material from the unwanted area resulting formation of this layer on top of the contact pad.
Following formation of the dielectric layer and subsequent patterning step, the micro device is transferred from the donor or carrier substrate to the system or receiver substrate. Here, one can employ previous methods to modify the dielectric properties of the formed layer to conductive layer. In addition, one can employ a mechanical or thermal force, referring to process 2606, to remove the dielectric layer between the contact and micro device electrode. In the case of mechanical force, it can be applied to the micro device while system substrate is fixed.
In another case mechanical force can be applied to the back of the system substrate or to both the micro device and system substrate at the same time. FIG 18 shows the process step 2606 in which mechanical stress is applied to the micro device. Here applied mechanical stress 2700 allows removal of soft material 2702 between the contact pad and micro device electrode from the sidewalls where the opening exist. In an embodiment, mechanical force or stress can be applied to the individual micro device or to the several micro devices at the same time. This can be done either at the end of each micro device transfer step or at the end of the transfer step of several micro devices. The last step, block 2608, includes sequence of cleaning steps for removing the material residual on the system substrate.
[0090] In another embodiment, after the micro device transfer step, one can put thermal force on the dielectric layer, referring again to block 2606 in FIG 17.
Thermal force results evaporation of the dielectric layer between the contact pad and the micro device electrode, which allows a physical contact between them. Depending on the material evaporation temperature, variety of methods such as direct heating, conventional heating or laser beam can be used to heat the dielectric layer. In addition, thermal force can be used to soften or melt the material that can be easily removed from the opening area on the sidewalls between the contacts. Additional cleaning step may be used to remove the remaining residual on the system substrate. One can also use mechanical force during heating step to accelerate the dielectric removal process. Thermal force may also be used to reduce the required magnitude of the mechanical force in order to prevent catastrophic damages on the system substrate and micro devices.
[0091] Referring to process 2004, for formation of dual functional dielectric layer from soft material, different methods can be used to pattern the dielectric layer. In one case, dielectric layer is formed on the entire surface of the system substrate and then patterning steps are employed. In another case, referring to FIG 19, separator layer 2506 that can also be a light confining layer is first formed on the system substrate and then dielectric layer 2700 is formed on the system substrate. In case of formation of dielectric layer on top of the separator layer, additional steps may be used to remove the dielectric layer on top of the separator layer.
Separator layer isolates adjacent landing pads. Here, for example a well shape structure is formed around the contact biasing pad.
[0092] In another embodiment, stamping technique can be used to pattern the dielectric layer. FIG 20A shows process flow of forming patterned soft dielectric layer on the contact pad by stamping technique. Referring to FIG 20B, one method is to form dielectric layer 2912 on dummy substrate 2914 and pattern it in accordance to the contact bias pads pattern on the system substrate. Then stamper 2916 or carrier substrate is attached to patterned dielectric layer 2912 on the dummy substrate. The stamper can be made from wide variety of materials such as PDMS. Subsequently, stamper detaches or removes the dielectric layer from the dummy substrate. The last step is stamping the dielectric layer on the system substrate. In another embodiment, referring to FIG 20C, stamper or carrier substrate is patterned first in accordance to the formation of contact pads on the system substrate. For example, PDMS mold can be formed in any specific desired shape. Patterned stamp 2906 is attached on the surface of the dielectric layer. Dielectric layer is then removed from the dummy substrate according to the pattern of the stamper and then transferred to the system substrate.
[0093] In an embodiment, soft dielectric layer can be formed directly on the micro devices rather than system substrate. Here, micro devices may be on the growth substrate or on the carrier one. Dielectric layer is formed on the surface of the micro device, which requires to be attached to the contact pad. Methods such is immersion, spray coating or spin coating may be used to form this layer. The next step is the transfer of the device to the system substrate.
Following the transfer, disclosed methods are used to remove or modify the dielectric layer.
[0094] In an embodiment, mechanical or thermal force can be used to partially remove the dielectric layer. Here, soft material, which includes metal nanoparticles, can be used as the dual functional dielectric layer. Metal nanoparticles such as gold or silver are first dispersed in the dielectric material or solvent. Referring to FIG 21A, insulating layer 2800 or in one case light confining layer is formed on the system substrate prior to the formation of dielectric/conductive layer. Dielectric layer 2702 including metal nanoparticles 3000 forms layer 3002 on the system substrate. Insulating layer 2800 prevents formation of this layer on the entire surface and subsequent lateral shorting between the contact pads. Since nanoparticles are dispersed in the dielectric layer, the formed layer is not conductive and acts as a dielectric layer in the micro device transfer step. FIG 21B shows transferred micro device on layer 3002.
After the micro device transfer process, referring to FIG 21C, mechanical stress 2700 or thermal stress 2208 or both is applied to remove dielectric material 2702 and aggregate the metal nanoparticles between the contact pad and micro device electrode. Here, isolation layer prevents lateral electrical shorting between the contact pads on the system substrate due to the aggregated metal nanoparticles. One can also employ the heating step to melt the nanoparticles allowing stronger bonding between the electrode and contact pad.
[0095] In an embodiment, referring to FIG 22A, soft dielectric layer can be used to transfer micro devices with different heights from the donor substrate to the acceptor substrate. Here the donor or carrier substrate may hold micro devices with different heights.
During micro device transfer process, when hard dielectric layer is used and donor substrate is brought in close proximity of the receiver substrate, taller devices 3100 may prevent transfer of shorter devices to the system substrate. For example device 3100 increases the critical distance between the electrode of shorter height micro device 2104 and landing pad 3102 and therefore transfer force may not be strong enough to transfer the micro device.
Referring to FIG 22B, formed soft dielectric layer on the system substrate on the other hand, during micro device transfer process allows penetration of taller devices into this layer which in turn allows contact between the electrode of shorter height device and landing pad 3102.
Abstract
[0096] Alignment tolerance in mass transfer of micro devices into system substrate and bonding the micro devices with different height are challenges in most of selective transfer techniques. The invention solving these challenges by using current curing bonding layer. This increases the tolerance to the height variation of devices as the bonding layer can be deformed to cover different height devices during transfer. Also, curing and selective transfer is not limited to specific part of the landing area and the pad (bonding layer) can cover the most of landing area and so increasing alignment tolerance. In another embodiment, the bonding layer act as electrostatic force generator during transfer process and become conductive layer during operation of the device.
Claims 1. Using deformable bonding layer between system substrate and micro devices to accommodate the height difference in micro devices 2. A bonding layer according to claim 1 which is current curable layer.
3. A transfer mechanism for holding devices from donor substrate to system substrate according to claim 1 and 2 where the bonding layer is cured selectively by applying current to the bonding layer 4. A transfer mechanism according to claim 3 where the current is applied by circuit in the system substrate 5. A transfer mechanism according to claim 3 where the circuit applying current is partially or fully shared with the circuit driving the micro devices in operation mode 6. A transfer mechanism according to claim 3 where the curing current flows through micro device and system substrate 7. A transfer mechanism according to claim 3 where the curing current flows between to contact in the system substrate.
8. A system substrate having an array of pad structures consist of conductive layer and dielectric layer where dielectric layer can be modulated to be a conductive layer.
9. A dielectric layer according to claim 1 where the dielectric layer creates electrostatic force for attracting micro devices during the transfer operation 10. A dielectric layer according to claim 1 where the dielectric layer changes to conductive layer during normal operation to couple the circuit in the system substrate to the micro devices.
11. A dielectric layer according to claim 1 wherein a doped layer is used to change its property to conductive layer.
12. A dielectric layer according to claim 1 wherein the dielectric property is changed to conductive layer by the means of laser breakdown.
13. A method of coupling the micro device into system substrate after transfer by removing partially or fully the dielectric layer between the conductive layer of the pads and the micro devices 14. A method according to claim 6 wherein the dielectric layer is removed by the means of mechanical force.
15. A method according to claim 6 wherein the dielectric layer is removed by the means of thermal force.

Claims (14)

WHAT IS CLAIMED IS:
1. A method of integrated device fabrication, the integrated device comprising a plurality pixels each comprising at least one sub-pixel comprising a micro device integrated on a substrate, the method comprising:
extending an active area of a first sub-pixel to an area larger than an area of a first micro device of the first sub-pixel by patterning of a filler layer about the first micro device and between the first micro device and at least one second micro device.
2. A method according to claim 1 further comprising:
fabricating at least one reflective layer covering at least a portion of one side of the patterned filler layer, the reflective layer for confining at least a portion of incoming or outgoing light within the active area of the sub-pixel.
3. A method according to claim 2 wherein the reflective layer is fabricated as an electrode of the micro device.
4. A method according to claim 1 wherein the patterning of the filler layer further patterns the filler layer about a further sub-pixel.
5. A method according to claim 1 wherein the patterning of the filler layer further is performed with a dielectric filler material.
6. An integrated device comprising:
a plurality pixels each comprising at least one sub-pixel comprising a micro device integrated on a substrate; and a patterned filler layer formed about a first micro device of a first sub-pixel and between the first micro device and at least one second micro device, the patterned filler layer extending an active area of the first sub-pixel to an area larger than an area of the first micro device.
7. An integrated device according to claim 6 further comprising:
at least one reflective layer covering at least a portion of one side of the patterned filler layer, the reflective layer for confining at least a portion of incoming or outgoing light to the active area of the first sub-pixel.
8. An integrated device according to claim 7 wherein the reflective layer is an electrode of the micro device.
9. An integrated device according to claim 7 wherein the patterned filler layer is formed about a further sub-pixel.
10. A method of integrated device fabrication, the device comprising a plurality pixels each comprising at least one sub-pixel comprising a micro device integrated on a substrate, the method comprising:
integrating at least one micro device into a receiver substrate; and subsequently to the integration of the at least one micro device, integrating at least one thin-film electro-optical device into the receiver substrate.
11. A method according to claim 10, wherein integrating the at least one thin-film electro-optical device comprises forming an optical path for the micro device through all or some layers of the at least one electro-optical device.
12. A method according to claim 10 wherein integrating the at least one thin-film electro-optical device is such that an optical path for the micro device is through a surface or area of the integrated device other than a surface or area of the electro-optical device.
13. A method according to claim 10, further comprising fabricating an electrode of the thin-film electro-optical device, the electrode of the thin-film electro-optical device defining an active area of at least one of a pixel and a sub-pixel.
14. A method of according to claim 10, further comprising fabricating an electrode which serves as a shared electrode of both the thin-film electro-optical device and the light emitting micro device.
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CA2921737A CA2921737A1 (en) 2016-02-25 2016-02-25 Micro device integration into system substrate
US15/442,293 US20170215280A1 (en) 2016-01-21 2017-02-24 Selective transfer of micro devices
US17/222,506 US20210243894A1 (en) 2016-01-21 2021-04-05 Selective transfer of micro devices

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022047587A1 (en) * 2020-09-02 2022-03-10 Vuereal Inc. Low temperature bonding of microdevice integration into a system substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022047587A1 (en) * 2020-09-02 2022-03-10 Vuereal Inc. Low temperature bonding of microdevice integration into a system substrate

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