CA2503342A1 - Procede de traitement de donnees pour analyseur logique - Google Patents
Procede de traitement de donnees pour analyseur logique Download PDFInfo
- Publication number
- CA2503342A1 CA2503342A1 CA002503342A CA2503342A CA2503342A1 CA 2503342 A1 CA2503342 A1 CA 2503342A1 CA 002503342 A CA002503342 A CA 002503342A CA 2503342 A CA2503342 A CA 2503342A CA 2503342 A1 CA2503342 A1 CA 2503342A1
- Authority
- CA
- Canada
- Prior art keywords
- memory
- test data
- test
- control circuit
- test sample
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 238000003672 processing method Methods 0.000 title claims abstract description 15
- 238000000034 method Methods 0.000 claims abstract description 5
- 230000005540 biological transmission Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000001514 detection method Methods 0.000 description 3
- 238000013500 data storage Methods 0.000 description 1
- 230000006837 decompression Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/25—Testing of logic operation, e.g. by logic analysers
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3177—Testing of logic operation, e.g. by logic analysers
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
La présente invention concerne un procédé de traitement de données pour analyseur logique, qui est utilisé dans un analyseur logique (10) comprenant: un circuit de commande (17) apte à introduire en mémoire des données d'essai en provenance d'un échantillon d'essai (13); une mémoire (18) commandée par le circuit de commande (17), qui stocke les données d'essai reçues de l'échantillon d'essai (13); et un écran d'affichage (161) apte à afficher les données d'essai récupérées par le circuit de commande (17) dans la mémoire (18), lequel procédé est caractérisé en ce que le circuit de commande (17) commande à un logiciel de compression (19) de comprimer les données d'essai reçues en provenance de l'échantillon d'essai (13) avant de les stocker dans la mémoire (18), et de décomprimer les données d'essai comprimées avant leur transmission de la mémoire (18) à l'écran (161).
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US2002/031587 WO2004038589A1 (fr) | 2002-10-21 | 2002-10-21 | Procede de traitement de donnees pour analyseur logique |
Publications (1)
Publication Number | Publication Date |
---|---|
CA2503342A1 true CA2503342A1 (fr) | 2004-05-06 |
Family
ID=32173958
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002503342A Abandoned CA2503342A1 (fr) | 2002-10-21 | 2002-10-21 | Procede de traitement de donnees pour analyseur logique |
Country Status (7)
Country | Link |
---|---|
JP (1) | JP2006504183A (fr) |
CN (1) | CN1723442A (fr) |
AU (1) | AU2002347801A1 (fr) |
CA (1) | CA2503342A1 (fr) |
DE (1) | DE10297807T5 (fr) |
GB (1) | GB2411482B (fr) |
WO (1) | WO2004038589A1 (fr) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006090727A (ja) * | 2004-09-21 | 2006-04-06 | Nec Engineering Ltd | オンチップ・ロジックアナライザ |
US7528617B2 (en) * | 2006-03-07 | 2009-05-05 | Testmetrix, Inc. | Apparatus having a member to receive a tray(s) that holds semiconductor devices for testing |
US7734976B2 (en) * | 2006-11-30 | 2010-06-08 | Electro Scientific Industries, Inc. | Synchronizing control of test instruments |
CN103294602B (zh) * | 2012-02-28 | 2016-04-13 | 孕龙科技股份有限公司 | 逻辑分析仪的数据读取及写入其存储器的方法 |
TWI553323B (zh) * | 2014-07-15 | 2016-10-11 | Zeroplus Technology Co Ltd | Data Processing and Display Method of Logical Analysis System |
CN106291335A (zh) * | 2015-05-14 | 2017-01-04 | 孕龙科技股份有限公司 | 逻辑分析仪及其探棒 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3552175B2 (ja) * | 1995-05-17 | 2004-08-11 | 株式会社アドバンテスト | フェイルメモリ装置 |
GB9623215D0 (en) * | 1996-11-07 | 1997-01-08 | Process Insight Limited | Solid state memory test system with defect compression |
US6360340B1 (en) * | 1996-11-19 | 2002-03-19 | Teradyne, Inc. | Memory tester with data compression |
US6467053B1 (en) * | 1999-06-28 | 2002-10-15 | International Business Machines Corporation | Captured synchronous DRAM fails in a working environment |
-
2002
- 2002-10-21 JP JP2004546631A patent/JP2006504183A/ja active Pending
- 2002-10-21 CA CA002503342A patent/CA2503342A1/fr not_active Abandoned
- 2002-10-21 WO PCT/US2002/031587 patent/WO2004038589A1/fr active Application Filing
- 2002-10-21 CN CN02830084.XA patent/CN1723442A/zh active Pending
- 2002-10-21 GB GB0510267A patent/GB2411482B/en not_active Expired - Fee Related
- 2002-10-21 DE DE10297807T patent/DE10297807T5/de not_active Ceased
- 2002-10-21 AU AU2002347801A patent/AU2002347801A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
JP2006504183A (ja) | 2006-02-02 |
GB2411482B (en) | 2006-03-01 |
DE10297807T5 (de) | 2005-08-25 |
AU2002347801A1 (en) | 2004-05-13 |
AU2002347801A8 (en) | 2004-05-13 |
GB0510267D0 (en) | 2005-06-29 |
WO2004038589A1 (fr) | 2004-05-06 |
CN1723442A (zh) | 2006-01-18 |
GB2411482A (en) | 2005-08-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
FZDE | Discontinued |