AU2002347801A8 - Logic analyzer data processing method - Google Patents

Logic analyzer data processing method

Info

Publication number
AU2002347801A8
AU2002347801A8 AU2002347801A AU2002347801A AU2002347801A8 AU 2002347801 A8 AU2002347801 A8 AU 2002347801A8 AU 2002347801 A AU2002347801 A AU 2002347801A AU 2002347801 A AU2002347801 A AU 2002347801A AU 2002347801 A8 AU2002347801 A8 AU 2002347801A8
Authority
AU
Australia
Prior art keywords
data processing
processing method
logic analyzer
analyzer data
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002347801A
Other versions
AU2002347801A1 (en
Inventor
Chiu-Hao Cheng
Ming-Gwo Cheng
Tsung-Chih Huang
Chun-Feng Tzu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zeroplus Technology Co Ltd
Original Assignee
Zeroplus Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zeroplus Technology Co Ltd filed Critical Zeroplus Technology Co Ltd
Publication of AU2002347801A8 publication Critical patent/AU2002347801A8/en
Publication of AU2002347801A1 publication Critical patent/AU2002347801A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/25Testing of logic operation, e.g. by logic analysers
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3177Testing of logic operation, e.g. by logic analysers

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Tests Of Electronic Circuits (AREA)
AU2002347801A 2002-10-21 2002-10-21 Logic analyzer data processing method Abandoned AU2002347801A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2002/031587 WO2004038589A1 (en) 2002-10-21 2002-10-21 Logic analyzer data processing method

Publications (2)

Publication Number Publication Date
AU2002347801A8 true AU2002347801A8 (en) 2004-05-13
AU2002347801A1 AU2002347801A1 (en) 2004-05-13

Family

ID=32173958

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002347801A Abandoned AU2002347801A1 (en) 2002-10-21 2002-10-21 Logic analyzer data processing method

Country Status (7)

Country Link
JP (1) JP2006504183A (en)
CN (1) CN1723442A (en)
AU (1) AU2002347801A1 (en)
CA (1) CA2503342A1 (en)
DE (1) DE10297807T5 (en)
GB (1) GB2411482B (en)
WO (1) WO2004038589A1 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006090727A (en) * 2004-09-21 2006-04-06 Nec Engineering Ltd On-chip logic analyzer
US7528617B2 (en) * 2006-03-07 2009-05-05 Testmetrix, Inc. Apparatus having a member to receive a tray(s) that holds semiconductor devices for testing
US7734976B2 (en) * 2006-11-30 2010-06-08 Electro Scientific Industries, Inc. Synchronizing control of test instruments
CN103294602B (en) * 2012-02-28 2016-04-13 孕龙科技股份有限公司 The digital independent of logic analyser and write the method for its storer
TWI553323B (en) * 2014-07-15 2016-10-11 Zeroplus Technology Co Ltd Data Processing and Display Method of Logical Analysis System
CN106291335A (en) * 2015-05-14 2017-01-04 孕龙科技股份有限公司 Logic analyser and probe thereof

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3552175B2 (en) * 1995-05-17 2004-08-11 株式会社アドバンテスト Fail memory device
GB9623215D0 (en) * 1996-11-07 1997-01-08 Process Insight Limited Solid state memory test system with defect compression
US6360340B1 (en) * 1996-11-19 2002-03-19 Teradyne, Inc. Memory tester with data compression
US6467053B1 (en) * 1999-06-28 2002-10-15 International Business Machines Corporation Captured synchronous DRAM fails in a working environment

Also Published As

Publication number Publication date
JP2006504183A (en) 2006-02-02
GB2411482B (en) 2006-03-01
GB0510267D0 (en) 2005-06-29
DE10297807T5 (en) 2005-08-25
WO2004038589A1 (en) 2004-05-06
AU2002347801A1 (en) 2004-05-13
CA2503342A1 (en) 2004-05-06
CN1723442A (en) 2006-01-18
GB2411482A (en) 2005-08-31

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase
TH Corrigenda

Free format text: IN VOL 18, NO 23, PAGE(S) 6638 UNDER THE HEADING APPLICATIONS OPI - NAME INDEX UNDER THE NAME ZEROPLUS TECHNOLOGY CO., LTD., APPLICATION NO. 2002347801, UNDER INID (71) CORRECT THE NAME TO READ ZEROPLUS TECHNOLOGY CO., LTD.; CHEN, CHUNG-CHIN