CA2355615A1 - Module multipuce - Google Patents

Module multipuce Download PDF

Info

Publication number
CA2355615A1
CA2355615A1 CA002355615A CA2355615A CA2355615A1 CA 2355615 A1 CA2355615 A1 CA 2355615A1 CA 002355615 A CA002355615 A CA 002355615A CA 2355615 A CA2355615 A CA 2355615A CA 2355615 A1 CA2355615 A1 CA 2355615A1
Authority
CA
Canada
Prior art keywords
chips
chip module
bare
holes
circuit pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002355615A
Other languages
English (en)
Other versions
CA2355615C (fr
Inventor
Masayoshi Yamaguchi
Mitsutoshi Sawano
Kazutoshi Hohki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP19145594A external-priority patent/JP3461204B2/ja
Application filed by Individual filed Critical Individual
Publication of CA2355615A1 publication Critical patent/CA2355615A1/fr
Application granted granted Critical
Publication of CA2355615C publication Critical patent/CA2355615C/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
CA002355615A 1993-09-14 1994-09-14 Module multipuce Expired - Fee Related CA2355615C (fr)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP5-228644 1993-09-14
JP22864493 1993-09-14
JP19145594A JP3461204B2 (ja) 1993-09-14 1994-08-15 マルチチップモジュール
JP6-191455 1994-08-15
CA002171458A CA2171458C (fr) 1993-09-14 1994-09-14 Module multipuce

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CA002171458A Division CA2171458C (fr) 1993-09-14 1994-09-14 Module multipuce

Publications (2)

Publication Number Publication Date
CA2355615A1 true CA2355615A1 (fr) 1995-03-23
CA2355615C CA2355615C (fr) 2005-08-09

Family

ID=27170133

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002355615A Expired - Fee Related CA2355615C (fr) 1993-09-14 1994-09-14 Module multipuce

Country Status (1)

Country Link
CA (1) CA2355615C (fr)

Also Published As

Publication number Publication date
CA2355615C (fr) 2005-08-09

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Legal Events

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MKLA Lapsed

Effective date: 20130916