CA2264764A1 - Dynamically upgradeable disk array system and method - Google Patents

Dynamically upgradeable disk array system and method Download PDF

Info

Publication number
CA2264764A1
CA2264764A1 CA002264764A CA2264764A CA2264764A1 CA 2264764 A1 CA2264764 A1 CA 2264764A1 CA 002264764 A CA002264764 A CA 002264764A CA 2264764 A CA2264764 A CA 2264764A CA 2264764 A1 CA2264764 A1 CA 2264764A1
Authority
CA
Canada
Prior art keywords
disk array
chassis
frequency data
shunt
low frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002264764A
Other languages
English (en)
French (fr)
Inventor
Thomas B. Hawkins
Jeffrey A. Brown
Scott J. Bleiweiss
James W. Espy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EMC Corp
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/748,884 external-priority patent/US5890214A/en
Priority claimed from US08/801,603 external-priority patent/US5901151A/en
Application filed by Individual filed Critical Individual
Publication of CA2264764A1 publication Critical patent/CA2264764A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3055—Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3034—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a storage system, e.g. DASD based or network based
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3051—Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/409—Mechanical coupling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/20—Arrangements affording multiple use of the transmission path using different combinations of lines, e.g. phantom working

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Quality & Reliability (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Mathematical Physics (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
CA002264764A 1996-11-14 1997-09-29 Dynamically upgradeable disk array system and method Abandoned CA2264764A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US08/748,884 US5890214A (en) 1996-02-27 1996-11-14 Dynamically upgradeable disk array chassis and method for dynamically upgrading a data storage system utilizing a selectively switchable shunt
US748,884 1996-11-14
US801,603 1997-02-13
US08/801,603 US5901151A (en) 1996-02-27 1997-02-13 System for orthogonal signal multiplexing
PCT/US1997/017432 WO1998021660A1 (en) 1996-11-14 1997-09-29 Dynamically upgradeable disk array system and method

Publications (1)

Publication Number Publication Date
CA2264764A1 true CA2264764A1 (en) 1998-05-22

Family

ID=27115011

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002264764A Abandoned CA2264764A1 (en) 1996-11-14 1997-09-29 Dynamically upgradeable disk array system and method

Country Status (6)

Country Link
EP (1) EP0950220B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JP3516689B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
AU (1) AU4600497A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
CA (1) CA2264764A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE69724649T2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
WO (1) WO1998021660A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6356984B1 (en) * 1998-06-30 2002-03-12 Sun Microsystems, Inc. Digital data processing system having a data bus and a control bus
US6477139B1 (en) * 1998-11-15 2002-11-05 Hewlett-Packard Company Peer controller management in a dual controller fibre channel storage enclosure
US6260079B1 (en) 1998-11-15 2001-07-10 Hewlett-Packard Company Method and system for enhancing fibre channel loop resiliency for a mass storage enclosure by increasing component redundancy and using shunt elements and intelligent bypass management
AU2001251536A1 (en) * 2000-04-13 2001-10-30 Stratus Technologies International, S.A.R.L. Fault-tolerant maintenance bus, protocol, and method for using the same
US7263476B1 (en) * 2000-06-12 2007-08-28 Quad Research High speed information processing and mass storage system and method, particularly for information and application servers
JP4542762B2 (ja) * 2003-10-17 2010-09-15 株式会社東芝 放射線ｃｔ装置
US8385061B2 (en) * 2006-10-24 2013-02-26 Lsi Corporation System and method for implementing a meta-disk aggregation model for storage controllers
JP4500346B2 (ja) 2007-11-21 2010-07-14 富士通株式会社 ストレージシステム

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5208813A (en) * 1990-10-23 1993-05-04 Array Technology Corporation On-line reconstruction of a failed redundant array system
US5586250A (en) * 1993-11-12 1996-12-17 Conner Peripherals, Inc. SCSI-coupled module for monitoring and controlling SCSI-coupled raid bank and bank environment
JP3249868B2 (ja) * 1993-11-19 2002-01-21 株式会社日立製作所 アレイ形式の記憶装置システム

Also Published As

Publication number Publication date
DE69724649T2 (de) 2004-07-01
DE69724649D1 (de) 2003-10-09
EP0950220A4 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1999-10-20
EP0950220A1 (en) 1999-10-20
JP2000508458A (ja) 2000-07-04
WO1998021660A1 (en) 1998-05-22
EP0950220B1 (en) 2003-09-03
AU4600497A (en) 1998-06-03
JP3516689B2 (ja) 2004-04-05

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Legal Events

Date Code Title Description
EEER Examination request
FZDE Discontinued