AU2001251536A1 - Fault-tolerant maintenance bus, protocol, and method for using the same - Google Patents

Fault-tolerant maintenance bus, protocol, and method for using the same

Info

Publication number
AU2001251536A1
AU2001251536A1 AU2001251536A AU5153601A AU2001251536A1 AU 2001251536 A1 AU2001251536 A1 AU 2001251536A1 AU 2001251536 A AU2001251536 A AU 2001251536A AU 5153601 A AU5153601 A AU 5153601A AU 2001251536 A1 AU2001251536 A1 AU 2001251536A1
Authority
AU
Australia
Prior art keywords
fault
protocol
same
maintenance bus
tolerant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001251536A
Inventor
Joseph S. Amato
Paul Joyce
A. Charles Suffin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Stratus Technologies International SARL
Original Assignee
R L STRATUS TECHNOLOGIES INTER
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/548,536 external-priority patent/US6633996B1/en
Priority claimed from US09/548,202 external-priority patent/US6691257B1/en
Application filed by R L STRATUS TECHNOLOGIES INTER filed Critical R L STRATUS TECHNOLOGIES INTER
Publication of AU2001251536A1 publication Critical patent/AU2001251536A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2007—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
AU2001251536A 2000-04-13 2001-04-11 Fault-tolerant maintenance bus, protocol, and method for using the same Abandoned AU2001251536A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US09/548,536 US6633996B1 (en) 2000-04-13 2000-04-13 Fault-tolerant maintenance bus architecture
US09/548,536 2000-04-13
US09/548,202 2000-04-13
US09/548,202 US6691257B1 (en) 2000-04-13 2000-04-13 Fault-tolerant maintenance bus protocol and method for using the same
PCT/US2001/011804 WO2001079962A2 (en) 2000-04-13 2001-04-11 Fault-tolerant maintenance bus, protocol, and method for using the same

Publications (1)

Publication Number Publication Date
AU2001251536A1 true AU2001251536A1 (en) 2001-10-30

Family

ID=27068796

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001251536A Abandoned AU2001251536A1 (en) 2000-04-13 2001-04-11 Fault-tolerant maintenance bus, protocol, and method for using the same

Country Status (2)

Country Link
AU (1) AU2001251536A1 (en)
WO (1) WO2001079962A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100369003C (en) * 2001-11-16 2008-02-13 中兴通讯股份有限公司 Method for carrying out distribution function of multiple objects
US7304950B2 (en) * 2003-12-15 2007-12-04 Finisar Corporation Two-wire interface having dynamically adjustable data fields depending on operation code
EP2228725A1 (en) * 2009-03-13 2010-09-15 Giga-Byte Technology Co., Ltd. Motherboard with backup chipset
US8635500B2 (en) * 2011-08-09 2014-01-21 Alcatel Lucent System and method for powering redundant components
CN113190395B (en) * 2021-03-15 2023-08-18 新华三信息技术有限公司 State monitoring method and device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4128883A (en) * 1977-09-30 1978-12-05 Ncr Corporation Shared busy means in a common bus environment
DE69625597D1 (en) * 1995-06-15 2003-02-06 Intel Corp I / O PROCESSOR ARCHITECTURE WITH INTEGRATED PCI-PCI BRIDGE
US5751975A (en) * 1995-12-28 1998-05-12 Intel Corporation Method and apparatus for interfacing a device compliant to a first bus protocol to an external bus having a second bus protocol and for providing virtual functions through a multi-function intelligent bridge
DE69724649T2 (en) * 1996-11-14 2004-07-01 Emc Corp., Hopkinton DYNAMICALLY EXTENDABLE DISK ARRANGEMENT SYSTEM AND METHOD
US5892928A (en) * 1997-05-13 1999-04-06 Micron Electronics, Inc. Method for the hot add of a network adapter on a system including a dynamically loaded adapter driver
US6161197A (en) * 1998-05-14 2000-12-12 Motorola, Inc. Method and system for controlling a bus with multiple system hosts
US6223230B1 (en) * 1998-06-15 2001-04-24 Sun Microsystems, Inc. Direct memory access in a bridge for a multi-processor system

Also Published As

Publication number Publication date
WO2001079962A3 (en) 2003-02-27
WO2001079962A2 (en) 2001-10-25

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