CA2127948A1 - Surface Mount Solder Assembly of Leadless Integrated Circuit Packages to Substrates - Google Patents
Surface Mount Solder Assembly of Leadless Integrated Circuit Packages to SubstratesInfo
- Publication number
- CA2127948A1 CA2127948A1 CA2127948A CA2127948A CA2127948A1 CA 2127948 A1 CA2127948 A1 CA 2127948A1 CA 2127948 A CA2127948 A CA 2127948A CA 2127948 A CA2127948 A CA 2127948A CA 2127948 A1 CA2127948 A1 CA 2127948A1
- Authority
- CA
- Canada
- Prior art keywords
- solder
- bumps
- solder paste
- stencil
- paste deposits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910000679 solder Inorganic materials 0.000 title abstract 11
- 239000000758 substrate Substances 0.000 title abstract 3
- 239000002184 metal Substances 0.000 abstract 5
- 238000000034 method Methods 0.000 abstract 2
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 238000001816 cooling Methods 0.000 abstract 1
- 238000010438 heat treatment Methods 0.000 abstract 1
- 238000005476 soldering Methods 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1216—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by screen printing or stencil printing
- H05K3/1225—Screens or stencils; Holders therefor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3485—Applying solder paste, slurry or powder
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/13111—Tin [Sn] as principal constituent
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01013—Aluminum [Al]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/0103—Zinc [Zn]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01047—Silver [Ag]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01051—Antimony [Sb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01052—Tellurium [Te]
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01082—Lead [Pb]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0379—Stacked conductors
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10992—Using different connection materials, e.g. different solders, for the same connection
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0502—Patterning and lithography
- H05K2203/0545—Pattern for applying drops or paste; Applying a pattern made of drops or paste
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Described are a process for soldering at least one component having solder bumps to a substrate and a process for forming solder bumps on metal pads of an element, such as an IC package or substrate or both. The bumps are formed by stencil printing solder paste deposits on the metal pads, heating the solder paste deposits to reflow temperature of the solder in the solder paste deposits, and allowing the molten solder in each deposit to coalesce and during subsequent cooling solidify forming the bumps on the metal pads. The bumps are formed by conducting the stencil printing through apertures in an ultra-thick stencil, the apertures having trapezoidal crossection in the plane normal to the broad surfaces of the stencil with the top opening being smaller than the bottom opening and with the walls of the aperture sloping at an angle within a range of from 1 to 45 degrees from the vertical, the solder paste having a low tackiness and high metal loading, and the solder paste deposits covering an area which is equal to or exceeds an area of the metal pad in any ratio between 1.5:1 and 5:1. Bumps formed in this manner lead to the formation of reliable solder joints.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/128,492 US5346118A (en) | 1993-09-28 | 1993-09-28 | Surface mount solder assembly of leadless integrated circuit packages to substrates |
US128,492 | 1993-09-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2127948A1 true CA2127948A1 (en) | 1995-03-29 |
CA2127948C CA2127948C (en) | 1999-05-18 |
Family
ID=22435606
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002127948A Expired - Lifetime CA2127948C (en) | 1993-09-28 | 1994-07-12 | Surface mount solder assembly of leadless integrated circuit packages to substrates |
Country Status (9)
Country | Link |
---|---|
US (1) | US5346118A (en) |
EP (1) | EP0645948B1 (en) |
JP (1) | JP2682807B2 (en) |
KR (1) | KR100315763B1 (en) |
CA (1) | CA2127948C (en) |
DE (1) | DE69401108T2 (en) |
HK (1) | HK45497A (en) |
SG (1) | SG42901A1 (en) |
TW (1) | TW274148B (en) |
Families Citing this family (137)
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US6077725A (en) * | 1992-09-03 | 2000-06-20 | Lucent Technologies Inc | Method for assembling multichip modules |
US5390080A (en) * | 1993-05-03 | 1995-02-14 | Motorola | Tin-zinc solder connection to a printed circuit board of the like |
US5473512A (en) * | 1993-12-16 | 1995-12-05 | At&T Corp. | Electronic device package having electronic device boonded, at a localized region thereof, to circuit board |
US5632631A (en) * | 1994-06-07 | 1997-05-27 | Tessera, Inc. | Microelectronic contacts with asperities and methods of making same |
US5615824A (en) * | 1994-06-07 | 1997-04-01 | Tessera, Inc. | Soldering with resilient contacts |
US5802699A (en) * | 1994-06-07 | 1998-09-08 | Tessera, Inc. | Methods of assembling microelectronic assembly with socket for engaging bump leads |
US5983492A (en) * | 1996-11-27 | 1999-11-16 | Tessera, Inc. | Low profile socket for microelectronic components and method for making the same |
JP3348528B2 (en) * | 1994-07-20 | 2002-11-20 | 富士通株式会社 | Method for manufacturing semiconductor device, method for manufacturing semiconductor device and electronic circuit device, and electronic circuit device |
US5539153A (en) * | 1994-08-08 | 1996-07-23 | Hewlett-Packard Company | Method of bumping substrates by contained paste deposition |
FR2724526B1 (en) * | 1994-09-14 | 1996-12-13 | Peugeot | METHOD FOR FORMING SOLDERING PLOTS ON CONDUCTIVE PORTIONS OF A PRINTED CIRCUIT |
KR0137826B1 (en) * | 1994-11-15 | 1998-04-28 | 문정환 | Package method and device package |
US6465743B1 (en) * | 1994-12-05 | 2002-10-15 | Motorola, Inc. | Multi-strand substrate for ball-grid array assemblies and method |
US5553538A (en) * | 1995-01-30 | 1996-09-10 | Motorola, Inc. | Method and apparatus for stencil printing printed circuit boards |
US5573171A (en) * | 1995-02-16 | 1996-11-12 | Trw Inc. | Method of thin film patterning by reflow |
TW373308B (en) * | 1995-02-24 | 1999-11-01 | Agere Systems Inc | Thin packaging of multi-chip modules with enhanced thermal/power management |
TW267265B (en) * | 1995-06-12 | 1996-01-01 | Connector Systems Tech Nv | Low cross talk and impedance controlled electrical connector |
US6939173B1 (en) | 1995-06-12 | 2005-09-06 | Fci Americas Technology, Inc. | Low cross talk and impedance controlled electrical connector with solder masses |
WO1997003482A1 (en) * | 1995-07-07 | 1997-01-30 | Minnesotta Mining And Manufacturing Company | Separable electrical connector assembly having a planar array of conductive protrusions |
TW336371B (en) * | 1995-07-13 | 1998-07-11 | Motorola Inc | Method for forming bumps on a substrate the invention relates to a method for forming bumps on a substrate |
US5872051A (en) * | 1995-08-02 | 1999-02-16 | International Business Machines Corporation | Process for transferring material to semiconductor chip conductive pads using a transfer substrate |
US5874199A (en) * | 1995-11-30 | 1999-02-23 | International Business Machines Corporation | Method of forming oversized solder bumps |
US5767447A (en) | 1995-12-05 | 1998-06-16 | Lucent Technologies Inc. | Electronic device package enclosed by pliant medium laterally confined by a plastic rim member |
EP0778616A3 (en) | 1995-12-05 | 1999-03-31 | Lucent Technologies Inc. | Method of packaging devices with a gel medium confined by a rim member |
US6147870A (en) * | 1996-01-05 | 2000-11-14 | Honeywell International Inc. | Printed circuit assembly having locally enhanced wiring density |
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US5742483A (en) | 1996-04-10 | 1998-04-21 | International Business Machines Corporation | Method for producing circuit board assemblies using surface mount components with finely spaced leads |
US6024584A (en) * | 1996-10-10 | 2000-02-15 | Berg Technology, Inc. | High density connector |
US6093035A (en) * | 1996-06-28 | 2000-07-25 | Berg Technology, Inc. | Contact for use in an electrical connector |
JPH1041615A (en) | 1996-07-19 | 1998-02-13 | Matsushita Electric Ind Co Ltd | Substrate for mounting semiconductor chip and method for mounting semiconductor chip |
US5776798A (en) * | 1996-09-04 | 1998-07-07 | Motorola, Inc. | Semiconductor package and method thereof |
SG71046A1 (en) | 1996-10-10 | 2000-03-21 | Connector Systems Tech Nv | High density connector and method of manufacture |
US6241535B1 (en) | 1996-10-10 | 2001-06-05 | Berg Technology, Inc. | Low profile connector |
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- 1993-09-28 US US08/128,492 patent/US5346118A/en not_active Expired - Lifetime
-
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- 1994-06-01 TW TW083105026A patent/TW274148B/zh not_active IP Right Cessation
- 1994-07-12 CA CA002127948A patent/CA2127948C/en not_active Expired - Lifetime
- 1994-09-21 EP EP94306928A patent/EP0645948B1/en not_active Expired - Lifetime
- 1994-09-21 DE DE69401108T patent/DE69401108T2/en not_active Expired - Lifetime
- 1994-09-21 SG SG1996000549A patent/SG42901A1/en unknown
- 1994-09-27 KR KR1019940024235A patent/KR100315763B1/en not_active IP Right Cessation
- 1994-09-28 JP JP6257358A patent/JP2682807B2/en not_active Expired - Fee Related
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1997
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DE69401108T2 (en) | 1997-04-03 |
KR100315763B1 (en) | 2002-02-19 |
EP0645948B1 (en) | 1996-12-11 |
DE69401108D1 (en) | 1997-01-23 |
EP0645948A1 (en) | 1995-03-29 |
HK45497A (en) | 1997-04-18 |
KR950009989A (en) | 1995-04-26 |
TW274148B (en) | 1996-04-11 |
US5346118A (en) | 1994-09-13 |
JPH07154061A (en) | 1995-06-16 |
SG42901A1 (en) | 1997-10-17 |
JP2682807B2 (en) | 1997-11-26 |
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