CA2056221A1 - Circuit integre programmable utilisant des donnees de controle pour selectionner des donnees en serie ou parallele - Google Patents
Circuit integre programmable utilisant des donnees de controle pour selectionner des donnees en serie ou paralleleInfo
- Publication number
- CA2056221A1 CA2056221A1 CA2056221A CA2056221A CA2056221A1 CA 2056221 A1 CA2056221 A1 CA 2056221A1 CA 2056221 A CA2056221 A CA 2056221A CA 2056221 A CA2056221 A CA 2056221A CA 2056221 A1 CA2056221 A1 CA 2056221A1
- Authority
- CA
- Canada
- Prior art keywords
- parallel
- input
- serial
- data
- control signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2323783A JPH04192809A (ja) | 1990-11-27 | 1990-11-27 | プログラマブル集積回路 |
JP2-323783 | 1990-11-27 |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2056221A1 true CA2056221A1 (fr) | 1992-05-28 |
CA2056221C CA2056221C (fr) | 1995-05-09 |
Family
ID=18158572
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002056221A Expired - Fee Related CA2056221C (fr) | 1990-11-27 | 1991-11-26 | Circuit integre programmable utilisant des donnees de controle pour selectionner des donnees en serie ou parallele |
Country Status (5)
Country | Link |
---|---|
US (1) | US5282164A (fr) |
EP (1) | EP0488678A3 (fr) |
JP (1) | JPH04192809A (fr) |
KR (1) | KR950008479B1 (fr) |
CA (1) | CA2056221C (fr) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6825698B2 (en) * | 2001-08-29 | 2004-11-30 | Altera Corporation | Programmable high speed I/O interface |
JPH0744586B2 (ja) * | 1993-02-26 | 1995-05-15 | 日本電気株式会社 | パラレルデータ転送回路 |
US5848285A (en) * | 1995-12-26 | 1998-12-08 | Cypress Semiconductor Corporation | Macrocell having a dual purpose input register for use in a logic device |
US5869982A (en) * | 1995-12-29 | 1999-02-09 | Cypress Semiconductor Corp. | Programmable I/O cell with data conversion capability |
US5811989A (en) * | 1995-12-29 | 1998-09-22 | Cypress Semiconductor Corp. | Programmable I/O cell with data conversion capability |
US5786710A (en) * | 1995-12-29 | 1998-07-28 | Cypress Semiconductor Corp. | Programmable I/O cell with data conversion capability |
US5917337A (en) * | 1995-12-29 | 1999-06-29 | Cypress Semiconductor Corp. | Programmable I/O cell with data conversion capability |
US5760719A (en) * | 1995-12-29 | 1998-06-02 | Cypress Semiconductor Corp. | Programmable I/O cell with data conversion capability |
US6510487B1 (en) * | 1996-01-24 | 2003-01-21 | Cypress Semiconductor Corp. | Design architecture for a parallel and serial programming interface |
TW371758B (en) * | 1997-06-04 | 1999-10-11 | Siemens Ag | Method to optimize the signal-propagation-time in a reprogrammable switching circuit and reprogrammable switching circuit with program-code optimized in said signal-propagation time |
JP4612139B2 (ja) * | 2000-02-08 | 2011-01-12 | 富士通セミコンダクター株式会社 | 入力回路及びその入力回路を利用する半導体装置 |
DE10041377A1 (de) * | 2000-08-23 | 2002-03-14 | Infineon Technologies Ag | Integrierte Halbleiterschaltung mit in einem Halbleiterchip eingebetteter Halbleiterspeicheranordnung |
US6525973B1 (en) * | 2001-12-12 | 2003-02-25 | Xilinx, Inc. | Automatic bitline-latch loading for flash prom test |
EP1968193B1 (fr) * | 2002-01-17 | 2011-07-27 | Sicronic Remote KG, LLC | Utilisation de bloc E/S inutilisé pour fonctions logiques de noyau |
US7796464B1 (en) | 2003-06-27 | 2010-09-14 | Cypress Semiconductor Corporation | Synchronous memory with a shadow-cycle counter |
US7893772B1 (en) | 2007-12-03 | 2011-02-22 | Cypress Semiconductor Corporation | System and method of loading a programmable counter |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3987410A (en) * | 1974-06-24 | 1976-10-19 | International Business Machines Corporation | Array logic fabrication for use in pattern recognition equipments and the like |
US4723226A (en) * | 1982-09-29 | 1988-02-02 | Texas Instruments Incorporated | Video display system using serial/parallel access memories |
JPS59180871A (ja) * | 1983-03-31 | 1984-10-15 | Fujitsu Ltd | 半導体メモリ装置 |
US4663735A (en) * | 1983-12-30 | 1987-05-05 | Texas Instruments Incorporated | Random/serial access mode selection circuit for a video memory system |
US4870302A (en) * | 1984-03-12 | 1989-09-26 | Xilinx, Inc. | Configurable electrical circuit having configurable logic elements and configurable interconnects |
US4718039A (en) * | 1984-06-29 | 1988-01-05 | International Business Machines | Intermediate memory array with a parallel port and a buffered serial port |
JPS6194296A (ja) * | 1984-10-16 | 1986-05-13 | Fujitsu Ltd | 半導体記憶装置 |
US4766569A (en) * | 1985-03-04 | 1988-08-23 | Lattice Semiconductor Corporation | Programmable logic array |
JPH07111822B2 (ja) * | 1986-03-07 | 1995-11-29 | 株式会社日立製作所 | 半導体記憶装置 |
US4758745B1 (en) * | 1986-09-19 | 1994-11-15 | Actel Corp | User programmable integrated circuit interconnect architecture and test method |
JP2982902B2 (ja) * | 1987-06-16 | 1999-11-29 | 三菱電機株式会社 | 半導体メモリ |
NL8802125A (nl) * | 1988-08-29 | 1990-03-16 | Philips Nv | Geintegreerde geheugenschakeling met parallelle en seriele in- en uitgang. |
-
1990
- 1990-11-27 JP JP2323783A patent/JPH04192809A/ja active Pending
-
1991
- 1991-11-25 US US07/796,686 patent/US5282164A/en not_active Expired - Lifetime
- 1991-11-26 CA CA002056221A patent/CA2056221C/fr not_active Expired - Fee Related
- 1991-11-26 KR KR1019910021317A patent/KR950008479B1/ko not_active IP Right Cessation
- 1991-11-27 EP EP19910310932 patent/EP0488678A3/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
US5282164A (en) | 1994-01-25 |
KR950008479B1 (ko) | 1995-07-31 |
EP0488678A3 (en) | 1993-12-22 |
CA2056221C (fr) | 1995-05-09 |
KR920010650A (ko) | 1992-06-27 |
EP0488678A2 (fr) | 1992-06-03 |
JPH04192809A (ja) | 1992-07-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
MKLA | Lapsed |