CA2035637A1 - Methode et dispositif de generation de sequences de controle de trame de 48 bits - Google Patents

Methode et dispositif de generation de sequences de controle de trame de 48 bits

Info

Publication number
CA2035637A1
CA2035637A1 CA002035637A CA2035637A CA2035637A1 CA 2035637 A1 CA2035637 A1 CA 2035637A1 CA 002035637 A CA002035637 A CA 002035637A CA 2035637 A CA2035637 A CA 2035637A CA 2035637 A1 CA2035637 A1 CA 2035637A1
Authority
CA
Canada
Prior art keywords
frame
information
encoding
check sequence
node
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002035637A
Other languages
English (en)
Inventor
Anthony G. Lauck
Ian M.C. Shand
John Harper
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Compaq Computer Holding Ltd
Original Assignee
Anthony G. Lauck
Ian M.C. Shand
John Harper
Digital Equipment International Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Anthony G. Lauck, Ian M.C. Shand, John Harper, Digital Equipment International Limited filed Critical Anthony G. Lauck
Publication of CA2035637A1 publication Critical patent/CA2035637A1/fr
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Communication Control (AREA)
  • Computer And Data Communications (AREA)
CA002035637A 1990-02-06 1991-02-05 Methode et dispositif de generation de sequences de controle de trame de 48 bits Abandoned CA2035637A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB9002643.6 1990-02-06
GB9002643A GB2242104B (en) 1990-02-06 1990-02-06 Method and apparatus for generating a frame check sequence

Publications (1)

Publication Number Publication Date
CA2035637A1 true CA2035637A1 (fr) 1991-08-07

Family

ID=10670509

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002035637A Abandoned CA2035637A1 (fr) 1990-02-06 1991-02-05 Methode et dispositif de generation de sequences de controle de trame de 48 bits

Country Status (7)

Country Link
US (2) US5307355A (fr)
EP (1) EP0441041B1 (fr)
JP (1) JPH0528078A (fr)
AU (1) AU627642B2 (fr)
CA (1) CA2035637A1 (fr)
DE (1) DE69029847T2 (fr)
GB (1) GB2242104B (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9213272D0 (en) 1992-06-23 1992-08-05 Digital Equipment Int Check sequence preservation
US5438575A (en) * 1992-11-16 1995-08-01 Ampex Corporation Data storage system with stale data detector and method of operation
US5638370A (en) * 1994-12-28 1997-06-10 Intel Corporation Status bit controlled HDLC accelerator
GB2321374A (en) * 1997-01-21 1998-07-22 Ico Services Ltd Spread spectrum satellite communication
JP3272283B2 (ja) * 1997-11-14 2002-04-08 富士通株式会社 電子データ保管装置
US6075774A (en) * 1997-11-18 2000-06-13 3Com Corporation Method and device for generating a frame check sequence
US6249525B1 (en) * 1998-03-27 2001-06-19 Nexabit Networks, Inc. Method of and apparatus for inserting and/or deleting escape characters into and from data packets and datagrams therefor on high speed data stream networking lines
CN101009531B (zh) * 2006-01-25 2010-04-07 华为技术有限公司 进行差错控制的方法和互助中转系统

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3439329A (en) * 1965-05-05 1969-04-15 Gen Electric Electronic error detection and message routing system for a digital communication system
US3678469A (en) * 1970-12-01 1972-07-18 Ibm Universal cyclic division circuit
US3689899A (en) * 1971-06-07 1972-09-05 Ibm Run-length-limited variable-length coding with error propagation limitation
US3872430A (en) * 1973-11-23 1975-03-18 Paul Emile Boudreau Method and apparatus of error detection for variable length words using a polynomial code
US4346440A (en) * 1978-06-30 1982-08-24 Motorola, Inc. Advanced data link controller
GB2094041B (en) * 1981-03-03 1985-08-21 Sangamo Weston Data receivers incorporating error code detection and decoding
JPS5846741A (ja) * 1981-09-11 1983-03-18 Nec Corp 復号器
JPS5917628A (ja) * 1982-07-20 1984-01-28 Hitachi Ltd 端末操作代行制御方法
US4631666A (en) * 1982-10-25 1986-12-23 Burroughs Corporation Data transfer network for variable protocol management
US4628504A (en) * 1983-01-31 1986-12-09 Honeywell Inc. Distributed bus control communication protocol
GB8425375D0 (en) * 1984-10-08 1984-11-14 Gen Electric Co Plc Data communication systems
JPS61252719A (ja) * 1985-05-02 1986-11-10 Hitachi Ltd バ−スト誤りの訂正方法および符号・復号装置
US4723243A (en) * 1985-12-02 1988-02-02 Advanced Micro Devices, Inc. CRC calculation machine with variable bit boundary
US4712215A (en) * 1985-12-02 1987-12-08 Advanced Micro Devices, Inc. CRC calculation machine for separate calculation of checkbits for the header packet and data packet
US4809273A (en) * 1987-01-29 1989-02-28 International Business Machines Corporation Device for verifying operation of a checking code generator
EP0313707B1 (fr) * 1987-10-30 1993-03-31 International Business Machines Corporation Moyens pour protéger l'intégrité de données
EP0317683B1 (fr) * 1987-11-27 1993-06-30 International Business Machines Corporation Les moyens de contrôle de la validité des données
JPH01150940A (ja) * 1987-12-08 1989-06-13 Hitachi Ltd Ｃｒｃ演算方式
US5121396A (en) * 1988-10-27 1992-06-09 International Business Machines Corp. Preservation of crc integrity upon intentional data alteration during message transmission

Also Published As

Publication number Publication date
GB2242104A (en) 1991-09-18
AU627642B2 (en) 1992-08-27
EP0441041A2 (fr) 1991-08-14
GB9002643D0 (en) 1990-04-04
EP0441041A3 (en) 1992-11-25
US5553085A (en) 1996-09-03
US5307355A (en) 1994-04-26
AU6926191A (en) 1991-08-08
DE69029847T2 (de) 1997-08-14
GB2242104B (en) 1994-04-13
JPH0528078A (ja) 1993-02-05
EP0441041B1 (fr) 1997-01-29
DE69029847D1 (de) 1997-03-13

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Legal Events

Date Code Title Description
FZDE Discontinued