CA1213678A - Lead frame for plastic encapsulated semiconductor device - Google Patents

Lead frame for plastic encapsulated semiconductor device

Info

Publication number
CA1213678A
CA1213678A CA000471714A CA471714A CA1213678A CA 1213678 A CA1213678 A CA 1213678A CA 000471714 A CA000471714 A CA 000471714A CA 471714 A CA471714 A CA 471714A CA 1213678 A CA1213678 A CA 1213678A
Authority
CA
Canada
Prior art keywords
lead frame
substrate support
hole
connecting band
plastic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000471714A
Other languages
French (fr)
Inventor
Mikio Nishikawa
Hiroyuki Fujii
Kenichi Tateno
Masami Yokozawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP1981100697U external-priority patent/JPS587356U/en
Priority claimed from JP10790581A external-priority patent/JPS589348A/en
Priority claimed from CA000406545A external-priority patent/CA1195782A/en
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to CA000471714A priority Critical patent/CA1213678A/en
Application granted granted Critical
Publication of CA1213678A publication Critical patent/CA1213678A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

ABSTRACT OF THE DISCLOSURE:

The invention provides a lead frame for a plastic encapsulated semiconductor device wherein one of the external leads connected to a first connecting band extends from one edge of a substrate support which supports a semiconductor substrate and also serves as a heat sink, two strips are connected to a second connecting band from the other edge of the substrate support, a notch is formed between the two strips of the second connecting band to allow proper positioning of the lead frame and to decrease thermal deformation during plastic encapsulation. Further, another lead frame is provided wherein a through hole is formed extending within the substrate support in the direction of thickness thereof in order to allow uniform flow of the resin and to form a thin resin layer on the rear surface of the substrate support.

Description

12136~
TITLE OF THE INVENTION:
Lead Frame for Plastic Encapsulated Semiconductor Device BACKGROUND OF THE INVENTION:
-S The present invention relates to a lead frame for a plastic encapsulated semiconductor device which can be used with relatively high power.
Plastic encapsulation of semiconductor devices has been recently developed. Manufacture of relatively high-power transistors includes plastic encapsulation.
In these devices, substrate supports of a lead frame to which semiconductor substrates or elements are mounted also serve as heat sinks. Rear surfaces of the substrate supports carry no semiconductor elements and are not covered with plastic but are open to the atmosphere. With the above structure, when mounting the plastic encapsulated power semiconductor devices on various types of elecf.rical apparatus, the exposed sides of the substrate supports are thermally coupled to radiators. In this case, insulating plates or films must be interposed between the substrate supports and the radiators, which must be electrically insulated from each other. For this reason, the mounting and assembly operations become cumbersome and time-consuminq.
In order to eliminate the above drawbacks, the rear surface of each substrate support is covered with a thin resin layer to provide insulation of the substrate supports from the external radiators. In the lead frame :~13~;7~

used for this purpose, one external lead connected to a first connecting band extends from one edge of each substrate support, and two strips connected to a second connecting band extend from the other edge of each substrate support. For plastic encapsulating inside molds, the external lead and the two strips of each substrate support are firmly clamped between the upper and lower molds. Thus, the insulating thin resin layer is uniformly formed on the rear surface of each substrate support.

However, in this case, the lead frame may be thermally deformed by the heat of the plastic encapsula-tion process. Further, since a space between the rear surface of each substrate support and the lower mold is very narrow, the plastic does not flow well, resulting in defective molding.

SUMMARY OF THE INVENTION:
It is, therefore, a first object of the present invention to provide a lead frame which effectively eliminates thermal deformation and resultant distortion (residual stress) arising from plastic encapsulation.
It is a second object of the present invention to provide a lead frame which allows uniform formation of a thin resin layer on the rear surface of a substrate support by improvin~ flow of a plastic in a mold.
In order to achieve the first object of the present invention, there is provided a lead frame, a ~ 213678 second connecting band of which has notches in order to absorb thermal deformation and resultant distortion.
Further, in order to achieve the second object of the present invention, there is provided a lead frame, each substrate support of which has through holes through which the plastic is easily flown onto the lower surface of the substrate support.
As a result, a plastic encapsulated semiconduc-tor device which has an electrically insulating structure and which has a uniform thin plastic layer on the rear surface of each substrate support can be manufactured with high yield.
Other objects, features and advantages of the present invention will be apparent from the following detailed description taken in conjunction with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS:
Fig. 1 is a plan view of a conventional lead frame for plastic encapsulated semiconductor devices;
Fig. 2 is a cross-sectional view of a plastic encapsulated transistor using the conventional lead frame in Fig. l;
Fig. 3 is a plan view of a lead frame for plastic encapsulated semiconductor devices according to one embodiment of the present invention;
Fig. 4 is a view showing two different shapes of notches;
Fig. ~ is a plan view of a lead frame ~213~78 according to another embodiment of the present invention;
Fig. 6 is a cross-sectional view of a plastic encapsulated semiconductor device using the lead frame in Fig. 5; and Fig. 7 shows a model for explainin~ resin flow within a mold when the lead frame in Fig. 5 is used.

DETAILED DESCRIPTION OF THE PRIOR ART:
Fig. 1 is a plan view of a lead frame used for plastic encapsulated semiconductor devices having an electrically insulating structure by means of a thin resin layer covered on the rear surface of a substrate support, a front surface of which has a semiconductor element thereon. The lead frame is disclosed in Japanese Patent Application No. 147,260/1982 laid open on September 11, 1982 and Canadian Patent Application No. 397,622/1982, filed by the same applica~t. Referring to Fig. 1, reference numeral 1 denotes a substrate support to which a semiconductor element (e.g., power transistor element) is mounted; 2 denotes through holes for mounting the semiconductor device on radiators with set screws; 3, 4 and 5 denote external leads; 6 denotes a first connecting band having holes 7 for determining a feeding pitch and allowing positioning of the lead frame during plastic encapsulation. Two strips a and 9 extend from one side of the substrate support 1 and the external strip 3 extends from the other side thereof.

.

~:136~f~

The stripes 8 and 9 are connected to a second connecting band 10. Holes 11 for allowing positioning of the lead frame during plastic encapsulation are formed in the second connecting band 10 and fit with parts of the mold. Fig. 2 is a cross-sectional view of the plastic encapsulated semiconductor device using the lead frame described above. A resin 14 is injected into a cavity between upper and lower molds 12 and 13.
The external leads 3 to 5 of the lead frame are clamped along one side of the lead frame between the upper and lower molds 12 and 13, while the two strips 8 and 9 and the second connecting band 10 are clamped therebetween along the other side of the lead frame. A
projection (not shown) of th~ upper mold 12 is fitted into each hole 7 formed in the first connecting band 6.
Further, a projection 15 of the upper mold 12 is fitted into each hole 11 of the second connecting band 10.
Reference numeral 16 denotes a projection for partially eliminating the resin to form a hole for the set screw;
17 denotes a power transistor element.
For plastic encapsulation of the power transistor using the lead frame described above, the substrate support 1 is supported by the external lead 3 and the strips 8 and 9 which are clamped between the upper and lower molds 12 and 13, and it floats in the cavity between the upper and lower molds 12 and 13. A
thin resin layer is formed on the rear surface of the substrate support, which substrate suppor~ also serves 1~3f~

as the heat sink and supports the power transistor on its one major surface. Thus, a plastic encapsulated semiconductor device is manufactured.
However, in performing plastic encapsulation with such a lead frame, defective molding often occurs.
The main causes of defective molding are thermal deformation of the lead frame during plastic encapsulation and incomplete injection of the resin. In the former case, changes in shape and thickness of the first and second connecting bands 6 and 10 and of the substrate support 1 result in thermal deformation due to heat applied in plastic encapsulation. The projections of the upper mold 12 are then not well-fitted into the holes 7 and 11 respectively formed in the first and second connecting bands 5 and 10. Further, when the lead frame is clamped between the upper and lower molds 12 and 13, part of the lead frame is deformed, resulting in defective molding. The above problems must be solved. In particular, since the second connecting band 10 is firmly mechanically connected to the substrate support 1, thermal deformation occuring in the second connecting band 10 tends to adversely affect the substrate support 1.

In the latter case, since the resin 14 has a lower thermal conductivity than the metal substrate ~upport 1, the thickness of the resin layer formed on the rear surface of the substrate suport 1 must be as thin as possible. If for this purpose, a very thin g - 6 -lZ~36~7~

resin layer is formed on the rear surface of the substrate support 1, a pinhole may be formed in the thin layer or a non-uniform layer may be formed thereon when the lead frame has only hole 2 in the substrate support 1, resulting in defective molding.
The defective molding described above is mainly caused by the smallness of the space between the rear surface of the substrate support 1 and the lower mold 13. The resin may not be able to flow into the gap, and gaseous bodies may be t~apped in the resin.
DESCRIPTION OF THE PREFERRED EMBODIMENTS:
Fig. 3 is a plan view of a lead frame according to one embodiment Oe the present invention.
The lead frame in Fig. 3 is the same as that in Fig. 1 except that a wedge-shaped notch 18 is formed between the strips 8 and 9 and at that side of the second connecting band 10 which opposes the substrate support 1. In the lead frame with the notch 18, the width of the second connecting band 10 is locally narrowed at the notch. Therefore, deformation of this part due to heat applied to the molds and, hence of the substrate support, is lessened.
The notch 18 acts as a positioning portion into which the projection of the upper mold 12 is fitted during plastic encapsulation. Since the notch 18 is wedge-shaped, the projection of the mold is properly fitted into the notch even if the relative position between the projection and the notch is slightly ~Z13~

misaligned. The notch 18 effects proper positioning of the projection of the mold and excellent plastic encapsulation is performed. As a result, defective encapsulation due to misalignment is greatly decreased.
The notch 18 is formed having an angle of about 90~, which achieves a ~ood feeding pitch for die bonding or wire bonding prior to plastic encapsulation.
In the above embodiment, the notch 18 is wedge-shaped.
However, as shown in Fig. 4, the shape of the notch may be of a trapezoidal or substantially semi-elliptical shape. Further, the position of the notch may be arbitrarily selected. Notches may be formed at the second connecting band between adjacent substrate supports; alternatively, notches may be formed in the first connecting band.
Fig. 5 is a plan view of a lead frame according to another embodiment of the present invention. The lead frame in Fig. 5 has the hole 2 formed in the substrate support. The lead frame in Fig. 5 is the same as that in Fig. 3 except that a through hole 19 is formed in the substrate support 1 to couple with the hole 2. The through hole 19 in Fig. 5 is of a rectangular shape; however, it is not limited to a rectangular shape. Note that the hole 19 must extend within the substrate support in the direction of thickness thereof.
Fig. 6 is a cross-sectional view of a plastic encapsulated semiconductor device using the lead frame ~2136~

shown in Fig. 5. The inside of the through hole 19 is filled with the resin 14, and the outer appearance of the semiconductor device thereof is the same as that in Fig. 2.
The through hole 19 effectively serves to obtain the plastic encapsulation structure in Fig. 6.
Fig. 7 shows an illustration of resin flow within the cavity of the molds during plastic encapsula-tion. The resin is injected into the cavity through a gate 20 formed between the upper and lower molds 12 and 13. The resin flows into a space 21 between the substrate support 1 and the lower mold 13 in the conventional flow direction indicated by arrow X1 and through the through hole 19 in the direction indicated by arrow X2. The flow distance of the resin to fill the space 21 is shortened. The resin is quickly and uniformly injected into the space 21. Further, any gaseous bodies are effectively expelled from the space 21 to the outside. Since the resin finally fills the through hole 19, the thick resin layer on the front surface of the substrate support 1 and the thin resin layer on the rear surface thereof are integrally connected. Therefore, the thin resin layer in the prepared plastic encapsulated semicondutor device may not easily peel off from the rear surface of the substrate support 1.
The resin first fills that portion which does not have strong resistance to the resin flow. If the _ g _ 121;~6~8 conventional lead frame is used, the resin finally fills the portion substantially at the center of the space immediately under the substrate support 1. Defective encapsulation occurs especially in this space. However, if the lead frame according to another embodiment of the present invention is used, the through hole 19 couples with the space 21 to eliminate any gaseous bodies.
Therefore, the through hole 19 is preferably formed at the center of the substrate support 1.
As may be apparent from the above description, a highly reliable plastic encapsulat~d semiconductor device which has a thin film on the rear surface of the substrate supports serving as the heat sink is obtained if the lead frame according to the present invention is used. In the second embodiment, part of the through hole l9 couples with the hole Z for the set screw, as exemplified. However, the through hole 19 may be formed independently of the hole 2. Further, the number of through holes l9 is not limited to one.
In summary, according to the present invention, defective encapsulation due to thermal deformation of the lead frame and incomplete resin flow are both greatly decreased in manufacturing a plastic encapsulated semiconductor device which has a uniform thin resin layer formed on the rear surface of the substrate support.

Claims

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A lead frame for a plastics encapsulated semiconductor device, wherein a first hole for a set screw is formed to extend through a substrate support in the direction of thickness thereof which is connected to one of a plurality of external leads extending from a first connecting band in one direction, and a second hole is formed to extend through said substrate support in the direction of thickness thereof, said second hole providing for flow of plastics through a portion of said substrate support, said first and second holes extending through the plastics encapsulating portion of said lead frame wherein at least part of said second hole is positioned substantially at a center of said substrate support.
CA000471714A 1981-07-06 1985-01-08 Lead frame for plastic encapsulated semiconductor device Expired CA1213678A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA000471714A CA1213678A (en) 1981-07-06 1985-01-08 Lead frame for plastic encapsulated semiconductor device

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP100697/1981 1981-07-06
JP1981100697U JPS587356U (en) 1981-07-06 1981-07-06 Lead frame for resin-encapsulated semiconductor devices
JP10790581A JPS589348A (en) 1981-07-09 1981-07-09 Lead frame
JP107905/1981 1981-07-09
CA000406545A CA1195782A (en) 1981-07-06 1982-07-05 Lead frame for plastic encapsulated semiconductor device
CA000471714A CA1213678A (en) 1981-07-06 1985-01-08 Lead frame for plastic encapsulated semiconductor device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CA000406545A Division CA1195782A (en) 1981-07-06 1982-07-05 Lead frame for plastic encapsulated semiconductor device

Publications (1)

Publication Number Publication Date
CA1213678A true CA1213678A (en) 1986-11-04

Family

ID=27167259

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000471714A Expired CA1213678A (en) 1981-07-06 1985-01-08 Lead frame for plastic encapsulated semiconductor device

Country Status (1)

Country Link
CA (1) CA1213678A (en)

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