JPS6244815B2 - - Google Patents
Info
- Publication number
- JPS6244815B2 JPS6244815B2 JP56064893A JP6489381A JPS6244815B2 JP S6244815 B2 JPS6244815 B2 JP S6244815B2 JP 56064893 A JP56064893 A JP 56064893A JP 6489381 A JP6489381 A JP 6489381A JP S6244815 B2 JPS6244815 B2 JP S6244815B2
- Authority
- JP
- Japan
- Prior art keywords
- strip
- common connection
- resin
- substrate support
- connection strip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000011347 resin Substances 0.000 claims description 32
- 229920005989 resin Polymers 0.000 claims description 32
- 238000007789 sealing Methods 0.000 claims description 27
- 239000000758 substrate Substances 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 238000009795 derivation Methods 0.000 claims 1
- 238000005520 cutting process Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000017525 heat dissipation Effects 0.000 description 4
- 238000000465 moulding Methods 0.000 description 4
- 238000005452 bending Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000010292 electrical insulation Methods 0.000 description 3
- 238000007667 floating Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000010445 mica Substances 0.000 description 1
- 229910052618 mica group Inorganic materials 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000003685 thermal hair damage Effects 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Description
【発明の詳細な説明】
本発明は比較的大きな電力を取り扱うことので
きる樹脂封止形半導体装置を製造する方法および
これに用いるリードフレームに関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a resin-sealed semiconductor device that can handle relatively large amounts of power, and a lead frame used therein.
樹脂封止形半導体装置は、量産性ならびに低コ
ストといつた面では金属封止形半導体装置に勝つ
ているが、動作時に発生する熱を放散させる面で
は金属封止形半導体装置に劣つている。近年、半
導体装置の樹脂封止化が進み、たとえばかなり大
きな電力を取り扱うことのできるトランジスタも
樹脂封止構造とされるに至つている。この場合、
放熱の面で十分な配慮が払われている。 Resin-encapsulated semiconductor devices are superior to metal-encapsulated semiconductor devices in terms of mass production and low cost, but are inferior to metal-encapsulated semiconductor devices in terms of dissipating heat generated during operation. . In recent years, resin encapsulation of semiconductor devices has progressed, and for example, transistors that can handle considerably large amounts of power have also come to have a resin encapsulation structure. in this case,
Sufficient consideration has been given to heat dissipation.
第１図は、樹脂封止構造を有する従来の電力用
トランジスタの構造例を示す断面図であり、トラ
ンジスタ素子１の接着される基板支持部２の裏面
を封止樹脂外殼３で覆うことなく露出させるとと
もに、放熱板への取り付けも可能にするためのね
じ止め用の貫通孔４を形成した構造となつてい
る。なお、５は保護用樹脂、６は外部リードであ
る。このような構造の樹脂封止形電力用トランジ
スタは、放熱板（図示せず）への取り付けに際し
ては、露出する基板支持部１の裏面を放熱板に対
して電気的には絶縁して熱的に結合する。この電
気的絶縁はマイカ板などの絶縁板を両者間に介在
させることによつてなされる。 FIG. 1 is a cross-sectional view showing a structural example of a conventional power transistor having a resin-sealed structure, in which the back surface of a substrate support portion 2 to which a transistor element 1 is bonded is exposed without being covered with a sealing resin shell 3. It has a structure in which a through hole 4 for screwing is formed to enable attachment to a heat sink. Note that 5 is a protective resin and 6 is an external lead. When a resin-sealed power transistor having such a structure is attached to a heat sink (not shown), the exposed back surface of the substrate support portion 1 is electrically insulated from the heat sink to prevent thermal damage. join to. This electrical insulation is achieved by interposing an insulating plate such as a mica plate between the two.
ところで、このような構造によれば、放熱効果
の点に関しては所期の目的が達成される。しかし
ながら、上記のように放熱板への取り付けに際し
て、絶縁板を介在させることが不可避であり、取
りつけ作業が煩雑となる。さらに、絶縁板は基板
支持体と放熱板との間に正しく位置しなければな
らないところであるが、両者を一体的に緊着する
際にともすると正しい位置関係が損われ、電気的
絶縁が保てなくなる。このため、第２図で示すよ
うに、基板支持体２の裏面側にも封止樹脂層７を
薄く設け、絶縁板を不要とするようにした構造の
樹脂封止形電力用トランジスタが提案されるに至
つている。 By the way, according to such a structure, the intended purpose can be achieved in terms of heat dissipation effect. However, as described above, when attaching to the heat sink, it is inevitable to interpose an insulating plate, making the attaching work complicated. Furthermore, the insulating plate must be positioned correctly between the substrate support and the heat sink, but if they are tightly attached together, the correct positional relationship will be damaged and electrical insulation will not be maintained. It disappears. Therefore, as shown in FIG. 2, a resin-sealed power transistor has been proposed in which a thin sealing resin layer 7 is also provided on the back side of the substrate support 2, eliminating the need for an insulating plate. It has reached the point where
第３図は、第１図および第２図で示した樹脂封
止形電力用トランジスタを組み立てるに際して、
通常用いられるリードフレームの平面図であり、
図示するように、移送ピツチの決定ならびに樹脂
封止時の位置決めをなす孔８が穿設された共通接
続細条９から同一方向へ向つてトランジスタの外
部リード６，１０，１１が延び、さらに外部リー
ド６の端部に基板支持体２が繋つた構造となつて
いる。トランジスタの組みたては、その左端部に
示したように、トランジスタ素子１の接着、トラ
ンジスタ素子電極と外部リード１０，１１との間
の金属細線１２による接続ならびに保護用樹脂５
の形成を経てなされる。 FIG. 3 shows the steps taken when assembling the resin-sealed power transistor shown in FIGS. 1 and 2.
It is a plan view of a commonly used lead frame,
As shown in the figure, external leads 6, 10, 11 of the transistors extend in the same direction from a common connection strip 9 in which a hole 8 is bored for determining the transfer pitch and positioning during resin sealing. The structure is such that the substrate support 2 is connected to the end of the lead 6. As shown at the left end, the transistor is assembled by adhering the transistor element 1, connecting the transistor element electrodes and external leads 10 and 11 with thin metal wires 12, and protecting resin 5.
This is done through the formation of
以上のようなリードフレームを用いてトランジ
スタ組立構体を得、これを第２図で示した封止構
造とするには、第４図で示すように、上金型１３
と下金型１４の間に形成された空所の中にトラン
ジスタ組立構体の基板支持部２を浮かせて配置
し、こののち、空所内へ樹脂３０を注入すること
が行われる。この注入により樹脂３０は基板支持
部２の裏面直下の空所にも満たされ、第２図で示
すように封止成型がなされる。 In order to obtain a transistor assembly structure using the lead frame as described above and make it into the sealing structure shown in FIG. 2, as shown in FIG.
The substrate support part 2 of the transistor assembly structure is placed floating in the cavity formed between the lower mold 14 and the lower mold 14, and then resin 30 is injected into the cavity. By this injection, the resin 30 also fills the void directly below the back surface of the substrate support portion 2, and sealing is performed as shown in FIG.
ところで、第４図からも明らかなように、第２
図で示した封止構造を第３図で示したリードフレ
ームを用いて得ようとした場合、リードフレーム
の外部リードの形成側のみが上下の金型によつて
挾持された状態で樹脂の注入がなされるため、基
板支持部２が樹脂の圧力で空所内で屈曲するおそ
れが多分にあり、したがつて、樹脂内の正しい位
置に基板支持部２が位置する状態で封止を行うこ
とが極めて困難であつた。かかる基板支持板の屈
曲は、薄い樹脂層７の厚みにばらつきをもたら
し、さらに、この厚みのばらつきは、完成したト
ランジスタの放熱特性のばらつきに直結する。 By the way, as is clear from Figure 4, the second
When attempting to obtain the sealing structure shown in the figure using the lead frame shown in Figure 3, the resin is injected with only the external lead formation side of the lead frame being held between the upper and lower molds. Because of this, there is a high possibility that the substrate support part 2 will bend within the cavity due to the pressure of the resin. Therefore, it is difficult to perform sealing with the substrate support part 2 located at the correct position within the resin. It was extremely difficult. Such bending of the substrate support plate causes variations in the thickness of the thin resin layer 7, and furthermore, this variation in thickness is directly linked to variations in the heat dissipation characteristics of the completed transistor.
本発明は、第２図で示した構造、すなわち、放
熱板を兼ねる基板支持体の一方の主面（半導体基
板の接着面とは反対側の面）の直下にも薄い樹脂
の層を形成した構造の樹脂封止形半導体装置を製
造するにあたり、基板支持体直下の薄い樹脂層の
厚みを高い精度でしかも均一な厚みに制御するこ
とのできる樹脂封止形半導体装置の製造方法とこ
れに用いるリードフレームを提供するものであ
る。 The present invention has the structure shown in FIG. 2, that is, a thin resin layer is also formed directly under one main surface (the surface opposite to the adhesive surface of the semiconductor substrate) of the substrate support that also serves as a heat sink. A method for manufacturing a resin-encapsulated semiconductor device that can control the thickness of a thin resin layer directly under a substrate support to a uniform thickness with high precision, and its use therein. It provides lead frames.
以下に図面を参照して本発明を詳しく説明す
る。 The present invention will be explained in detail below with reference to the drawings.
第５図は、本発明にかかるリードフレームの構
造例を示す図であり、第５図ａは平面図を、第５
図ｂは第５図ａのＢ−Ｂ線に沿つた断面図をそれ
ぞれ示す。図示するように、基板支持部２の外部
リード６に繋る辺とは反対側の辺から２本の細条
１５と１６が延び、これらが、第２の共通接続細
条１７に繋つた構造となつている。なお、細条１
５と１６には断面積の小さい部分１８と１９が存
在している。また、第２の共通接続細条に形成さ
れた孔２０は、樹脂封止工程で金型の一部と嵌合
し位置規正のために作用する。ところで、第５図
ｂで示すように、細条１５と１６の厚みは基板支
持体２よりも薄く選定され、しかも、その下面と
基板支持体２の下面との間に所定の段差が形成さ
れ、また、１８と１９の部分は、この部分の厚み
をさらに薄くすることによつて他部分よりも断面
積が小さくされている。 FIG. 5 is a diagram showing an example of the structure of a lead frame according to the present invention, and FIG.
FIG. 5b shows a cross-sectional view taken along the line B--B in FIG. 5a. As shown in the figure, two strips 15 and 16 extend from the side opposite to the side connected to the external lead 6 of the board support portion 2, and these are connected to a second common connection strip 17. It is becoming. In addition, detailed article 1
5 and 16 have portions 18 and 19 with small cross-sectional areas. Further, the hole 20 formed in the second common connection strip fits into a part of the mold during the resin sealing process, and acts for position regulation. By the way, as shown in FIG. 5b, the thickness of the strips 15 and 16 is selected to be thinner than that of the substrate support 2, and a predetermined step is formed between the lower surface of the strips and the lower surface of the substrate support 2. , 18 and 19 have a smaller cross-sectional area than other parts by further reducing the thickness of these parts.
第６図は、かかる本発明のリードフレームを用
いて形成したトランジスタ組立構体を樹脂で封止
成型する状態を示す図であり、上下の金型１３と
１４の間に形成される空所内へ樹脂３０を注入し
て成型する点では、従来の方法と同じである。し
かしながら、本発明のリードフレームを使用した
場合には、図示するように、リードフレームの外
部リード６が一方の側において上下の金型１３と
１４によつて挾持されるとともに、他方の側で
も、細条１５，１６ならびに第２の共通接続細条
１７が上下の金型１３と１４によつて挾持され
る。また第１の共通接続細条に設けた孔８に金型
の突出部が嵌合（図示せず）するばかりでなく、
第２の共通接続細条１７の孔２０にも金型の突出
部２１が嵌合する。なお、２２はねじ止め用の孔
を形成するべく樹脂を部分的に排除する突起であ
る。 FIG. 6 is a diagram showing a state in which a transistor assembly structure formed using the lead frame of the present invention is sealed and molded with resin, and the resin is poured into the cavity formed between the upper and lower molds 13 and 14. The method is the same as the conventional method in that 30 is injected and molded. However, when the lead frame of the present invention is used, as shown in the figure, the external lead 6 of the lead frame is held between the upper and lower molds 13 and 14 on one side, and also on the other side. The strips 15, 16 as well as the second common connecting strip 17 are clamped by the upper and lower molds 13 and 14. In addition, not only the protrusion of the mold fits into the hole 8 provided in the first common connecting strip (not shown), but also
A projection 21 of the mold also fits into the hole 20 of the second common connecting strip 17 . Note that 22 is a protrusion that partially removes the resin to form a hole for screwing.
このように、本発明の方法によれば、リードフ
レームの基板支持部２は、上下の金型１３と１４
によつて挾持される外部リード６と細条１５，１
６とにより支持されて金型内の空所内に浮いた状
態で位置する。また、第１、第２の共通接続細条
の双方は、金型によつて単に挾持されるだけでは
なく、これらに穿設した孔と金型の突起との嵌合
によつて水平方向の動きが完全に阻止されるた
め、上記の浮いた状態は極めて正確に制御され
る。 As described above, according to the method of the present invention, the substrate support part 2 of the lead frame is formed by the upper and lower molds 13 and 14.
The external lead 6 and the strip 15, 1 are held together by
6 and is positioned in a floating state within the cavity in the mold. Furthermore, both the first and second common connection strips are not only held between the molds, but also horizontally by fitting the holes drilled in them with the protrusions of the mold. Since movement is completely inhibited, the above-mentioned floating condition is controlled very precisely.
ところで、本発明では、第６図からも明らかな
ように、上下の金型１３と１４によつて形成され
る空所が、細条１５，１６に形成した断面積の小
さな部分１８，１９の上下で終つている。このた
め、封止成形後に封止外殼から外部へ導出される
部分は、細条１５，１６に形成した断面積の小さ
な部分１８，１９となる。かかる細条の導出部の
形状により、封止成型後の切断処理時に後述する
効果が奏される。 By the way, in the present invention, as is clear from FIG. 6, the space formed by the upper and lower molds 13 and 14 is smaller than the small cross-sectional areas 18 and 19 formed in the strips 15 and 16. It ends at the top and bottom. Therefore, the portions that are led out from the sealing shell after sealing are formed in the strips 15 and 16 and have small cross-sectional areas 18 and 19. Due to the shape of the lead-out portion of the strip, the effects described below can be achieved during the cutting process after the sealing molding.
第７図は上記の封止成型過程を経たのちの状態
を示す斜視図であり、図示するように封止外殼に
は、ねじ止め用の孔４の形成を有する肉薄部２３
と肉厚部２４が形成されているが、両者間に段差
が形成されていることにより、放熱板への取りつ
け時にねじの頂部が突出することのない状態が成
立する。 FIG. 7 is a perspective view showing the state after the above sealing molding process, and as shown in the figure, the sealing shell has a thin wall portion 23 having a hole 4 for screwing
A thick wall portion 24 is formed, but since a step is formed between the two, a state is established in which the top of the screw does not protrude when attached to a heat sink.
次いで、Ｘ−X′線ならびにＹ−Y′線に沿つた
分断処理を施すことによつて、第１の共通接続細
条９ならびに細条１５，１６を切断し、第８図で
示す構造の樹脂封止形トランジスタを得るわけで
あるが、上記のように、封止外殼の肉薄部２３か
ら導出する細条部分１８と１９が他部分にくらべ
て断面積の小さい部分とされているため、Ｙ−
Y′線に沿つた分断処理に際して矢印Ｚ−Z′で示す
上下方向の折り曲げを施すことによつて極めて容
易に分断することができる。また、断面積の小さ
い部分１８と１９の分断面が封止外殼の肉薄部２
３の側面に露呈するとともに、殼封外殼内でこれ
らの部分と細条との連繋部に段部が形成されるた
め、分断面での樹脂と細条との境界長が短かくな
り、また、この分断面から封止されたトランジス
タ素子１に至るまでのパスが長くなる。したがつ
て、この分断面からの水分等の侵入が困難になる
効果も奏される。なお、細条１５，１６の分断を
プレス等による切断でなすことも可能であるが、
切断精度を高めて突出する細条の切断面を封止外
殼の側面と実質的に同一な面となす場合には、封
止外殼に損傷を与え外観を損ねる危険性があり、
加えて、基板支持体に不要な衝撃を与えるおそれ
もある。したがつて、上記のように、折り曲げに
よる分断がのぞましい。 Next, the first common connection strip 9 and the strips 15 and 16 are cut by cutting along the X-X' line and the Y-Y' line, resulting in the structure shown in FIG. In order to obtain a resin-sealed transistor, as mentioned above, the strip portions 18 and 19 leading out from the thin portion 23 of the sealing shell have a smaller cross-sectional area than other portions. Y-
During the cutting process along the Y' line, the film can be separated very easily by bending in the vertical direction as indicated by the arrow Z-Z'. In addition, the cut surfaces of the portions 18 and 19 with small cross-sectional areas are the thin wall portions 2 of the sealing shell.
3, and a step is formed at the connecting part between these parts and the strip within the outer shell, so the boundary length between the resin and the strip at the cut plane is shortened, and , the path from this cut plane to the sealed transistor element 1 becomes longer. Therefore, the effect of making it difficult for moisture etc. to enter through this cut surface is also achieved. Note that it is also possible to divide the strips 15 and 16 by cutting with a press or the like.
If the cut surface of the protruding strip is made to have substantially the same surface as the side surface of the sealing shell by increasing the cutting precision, there is a risk of damaging the sealing shell and spoiling its appearance.
In addition, there is a possibility that unnecessary impact may be applied to the substrate support. Therefore, as mentioned above, it is desirable to divide by bending.
さらに、本発明の方法により形成したトランジ
スタでは、細条１５と１６の切り口が封止外殼の
側面に露出するが、第５図で示したように、基板
支持部２の下面と細条１５と１６の下面との間に
厚みの差に基く段差が形成されているため、完成
したトランジスタの放熱板へとりつけられる側の
樹脂封止外殼の下面と切り口との間には十分な間
隔が付与される。したがつて、この部分において
短絡事故が発生するおそれはない。 Furthermore, in the transistor formed by the method of the present invention, the cut ends of the strips 15 and 16 are exposed on the side surface of the sealing shell, but as shown in FIG. Since a step is formed based on the difference in thickness between the lower surface of the transistor and the lower surface of the transistor, a sufficient distance is provided between the lower surface of the resin-sealed shell and the cut end on the side that will be attached to the heat sink of the completed transistor. Ru. Therefore, there is no risk of a short circuit occurring in this part.
以上の実施例では、細条の断面積を小さくする
にあたり、細条１５と１６の一部を肉薄にした
が、たとえば、第９図ａで示すように細条１５と
１６の厚みは変化させず、くびれ部を形成するこ
とによつて細条１５と１６の幅を局部的に狭くす
ること、あるいは第９図ｂで示すように孔２５，
２６を形成して実質的に細条の幅を狭くするこ
と、さらに細条１５と１６の幅と厚みの双方を局
部的に小さくすることなどによつても断面積を小
さくすることができる。なお、本発明の方法で用
いる封止成型用の樹脂は出来うる限り熱伝導性の
高いものであることが望ましく、また、基板支持
部直下の樹脂層の厚みは、放熱特性と電気的絶縁
性の両者に鑑み、約0.3〜0.5mm程度に選定される
ことがのぞましく、この範囲で特に良好な結果が
得られた。 In the above embodiment, in order to reduce the cross-sectional area of the strips, some of the strips 15 and 16 were made thinner, but for example, as shown in FIG. 9a, the thickness of the strips 15 and 16 was changed. First, the width of the strips 15 and 16 can be locally narrowed by forming constrictions, or holes 25, 16, as shown in FIG. 9b.
The cross-sectional area can also be reduced by forming 26 to substantially reduce the width of the strips, and by locally reducing both the width and thickness of strips 15 and 16. Note that it is desirable that the resin for sealing molding used in the method of the present invention has as high a thermal conductivity as possible, and the thickness of the resin layer directly under the substrate support part is determined based on heat dissipation characteristics and electrical insulation. In view of both, it is desirable to select a thickness of about 0.3 to 0.5 mm, and particularly good results were obtained within this range.
以上説明したところから明らかなように、本発
明によれば、放熱板を兼ねる基板支持部の直下に
薄い樹脂層をもつ樹脂封止形半導体装置を、高い
封止精度を付与して形成することができる。 As is clear from the above explanation, according to the present invention, a resin-sealed semiconductor device having a thin resin layer directly under a substrate support portion that also serves as a heat sink can be formed with high sealing accuracy. Can be done.
第１図および第２図は従来の樹脂封止形電力用
トランジスタの構造を示す断面図、第３図は従来
のリードフレームを示す平面図、第４図は第３図
で示すリードフレームを用いて第２図で示す樹脂
封止形電力用トランジスタを形成するときの封止
成型の状態を示す図、第５図ａ，ｂは本発明のリ
ードフレームを示す平面図ならびに断面図、第６
図〜第８図は本発明の製造方法における封止成型
工程から完成までの状態を示す図、第９図ａ，ｂ
は細条の断面積を小さくする他の例を示す図であ
る。
１……トランジスタ素子、２……基板支持部、
３……封止樹脂外殼、４……ねじ止め用の孔、５
……保護用樹脂、６，１０，１１……外部リー
ド、１２……金属細線、１３，１４……金型、３
０……樹脂、７……薄い樹脂層、８，２０……
孔、９，１７……共通接続細条、１５，１６……
細条、１８，１９……細条の断面積の小さい部
分、２１，２２……金型の突起、２３……封止樹
脂外殼肉薄部、２４……封止樹脂外殼肉厚部、２
５，２６……孔。
1 and 2 are cross-sectional views showing the structure of a conventional resin-sealed power transistor, FIG. 3 is a plan view showing a conventional lead frame, and FIG. 4 is a cross-sectional view showing the structure of a conventional resin-sealed power transistor. Figures 5a and 5b are plan views and cross-sectional views showing the lead frame of the present invention;
Figures to Figure 8 are diagrams showing the state from the sealing molding process to completion in the manufacturing method of the present invention, Figures 9a and b
is a diagram showing another example of reducing the cross-sectional area of the strip. 1...Transistor element, 2...Substrate support part,
3... Sealing resin outer shell, 4... Hole for screwing, 5
...Protection resin, 6,10,11...External lead, 12...Metal thin wire, 13,14...Mold, 3
0...Resin, 7...Thin resin layer, 8,20...
Holes, 9, 17... Common connection strips, 15, 16...
Strips, 18, 19... Portions with small cross-sectional areas of strips, 21, 22... Protrusions of the mold, 23... Thin portions of the sealing resin shell, 24... Thick portions of the sealing resin shell, 2
5, 26... hole.
Claims (1)
出される外部リードに繋る第１の共通接続細条
と、前記基板支持体の他方の側から導出され、か
つ、導出方向と直交する断面の面積が所定の長さ
にわたり小さく設定された細条が繋る第２の共通
接続細条を有するリードフレームを用いて構成し
た半導体装置組立構体の前記外部リードと細条を
上下の金型で挾持し、前記基板支持部を金型内の
空所に浮かせるとともに、前記細条の断面積の小
さく設定された部分の一部を金型の空所内に残部
を金型間に位置させて樹脂封止したのち、前記外
部リードと第１の共通接続細条との連結部の切断
ならびに封止樹脂外殼から外部へ導出する前記細
条の小断面積部分の封止樹脂面に沿つた分断の処
理を施すことを特徴とする樹脂封止形半導体装置
の製造方法。 ２ 第１の共通接続細条、同共通接続細条から同
一方向にのびる複数本の外部リード部、同外部リ
ード部の１本の先端部に繋る基板支持部、同基板
支持部の外部リード部との連繋部側とは反対の側
に一端が繋り、導出方向に直交する断面が一部で
小さく設定された細条および同細条の他端に繋
り、前記第１の共通接続細条と基板支持部をはさ
んで平行にのびる第２の共通接続細条を有し、前
記細条は前記基板支持部より肉薄とされ、さら
に、その下面が基板支持部の下面より上部に位置
していることを特徴とするリードフレーム。[Scope of Claims] 1. A first common connection strip connected to an external lead led out from one side of the substrate support that also serves as a heat sink, and led out from the other side of the substrate support, and The external leads and strips of a semiconductor device assembly constructed using a lead frame having a second common connection strip to which strips whose cross-sectional areas perpendicular to the lead-out direction are set to be small over a predetermined length are connected. is held between upper and lower molds, and the substrate supporting part is floated in the cavity in the mold, and a part of the small cross-sectional area of the strip is placed in the cavity in the mold, and the remaining part is placed in the mold. After sealing with resin between the external leads and the first common connection strip, the connecting portion between the external lead and the first common connection strip is cut, and the sealing resin of the small cross-sectional area of the strip is led out from the sealing resin outer shell. A method for manufacturing a resin-sealed semiconductor device, characterized by performing a process of dividing along a surface. 2. A first common connection strip, a plurality of external lead parts extending in the same direction from the common connection strip, a board support part connected to the tip of one of the external lead parts, and an external lead of the board support part. One end is connected to the side opposite to the connecting part side with the section, and the cross section perpendicular to the derivation direction is partially set small, and the other end of the same strip is connected to the first common connection. A second common connection strip extends parallel to the strip and the substrate support, the strip is thinner than the substrate support, and the lower surface thereof is above the lower surface of the substrate support. A lead frame characterized by its location.
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6489381A JPS57178352A (en) | 1981-04-28 | 1981-04-28 | Manufacture of resin sealing type semiconductor device and lead frame employed thereon |
| US06/367,809 US4451973A (en) | 1981-04-28 | 1982-04-13 | Method for manufacturing a plastic encapsulated semiconductor device and a lead frame therefor |
| DE198282103521T DE63811T1 (en) | 1981-04-28 | 1982-04-26 | METHOD FOR PRODUCING A SEMICONDUCTOR ARRANGEMENT ENCLOSED IN PLASTIC AND A LADDER GRID THEREFOR. |
| EP19820103521 EP0063811B1 (en) | 1981-04-28 | 1982-04-26 | A method for manufacturing a plastic encapsulated semiconductor device |
| DE8282103521T DE3270561D1 (en) | 1981-04-28 | 1982-04-26 | A method for manufacturing a plastic encapsulated semiconductor device |
| CA000401752A CA1200623A (en) | 1981-04-28 | 1982-04-27 | Plastic encapsulated semiconductor device and a lead frame therefor |
| US06/581,251 US4589010A (en) | 1981-04-28 | 1984-02-17 | Method for manufacturing a plastic encapsulated semiconductor device and a lead frame therefor |
| CA000480771A CA1209721A (en) | 1981-04-28 | 1985-05-03 | Plastic encapsulated semiconductor device and lead frame therefor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6489381A JPS57178352A (en) | 1981-04-28 | 1981-04-28 | Manufacture of resin sealing type semiconductor device and lead frame employed thereon |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57178352A JPS57178352A (en) | 1982-11-02 |
| JPS6244815B2 true JPS6244815B2 (en) | 1987-09-22 |
Family
ID=13271210
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6489381A Granted JPS57178352A (en) | 1981-04-28 | 1981-04-28 | Manufacture of resin sealing type semiconductor device and lead frame employed thereon |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57178352A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59119040U (en) * | 1983-01-31 | 1984-08-11 | 日本電気ホームエレクトロニクス株式会社 | Resin-encapsulated semiconductor device |
| JPS60172346U (en) * | 1984-04-23 | 1985-11-15 | 新電元工業株式会社 | Resin-sealed semiconductor device |
| JPS6194349A (en) * | 1984-10-16 | 1986-05-13 | Sanken Electric Co Ltd | Manufacture of resin seal type semiconductor device and lead frame used for said manufacture |
| JPH0777248B2 (en) * | 1988-11-09 | 1995-08-16 | 富士電機株式会社 | Resin-sealed semiconductor device and manufacturing method thereof |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3431092A (en) * | 1965-10-22 | 1969-03-04 | Motorola Inc | Lead frame members for semiconductor devices |
| US3716764A (en) * | 1963-12-16 | 1973-02-13 | Texas Instruments Inc | Process for encapsulating electronic components in plastic |
| JPS5082967A (en) * | 1973-10-19 | 1975-07-04 | ||
| JPS538635A (en) * | 1976-07-14 | 1978-01-26 | Ichikoh Industries Ltd | Method of fixing gasket |
| JPS5487474A (en) * | 1977-12-23 | 1979-07-11 | Nec Corp | Semiconductor device |
| JPS57147260A (en) * | 1981-03-05 | 1982-09-11 | Matsushita Electronics Corp | Manufacture of resin-sealed semiconductor device and lead frame used therefor |
-
1981
- 1981-04-28 JP JP6489381A patent/JPS57178352A/en active Granted
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3716764A (en) * | 1963-12-16 | 1973-02-13 | Texas Instruments Inc | Process for encapsulating electronic components in plastic |
| US3431092A (en) * | 1965-10-22 | 1969-03-04 | Motorola Inc | Lead frame members for semiconductor devices |
| JPS5082967A (en) * | 1973-10-19 | 1975-07-04 | ||
| JPS538635A (en) * | 1976-07-14 | 1978-01-26 | Ichikoh Industries Ltd | Method of fixing gasket |
| JPS5487474A (en) * | 1977-12-23 | 1979-07-11 | Nec Corp | Semiconductor device |
| JPS57147260A (en) * | 1981-03-05 | 1982-09-11 | Matsushita Electronics Corp | Manufacture of resin-sealed semiconductor device and lead frame used therefor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57178352A (en) | 1982-11-02 |
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