CA1190336A - Waveform measurement and display apparatus - Google Patents
Waveform measurement and display apparatusInfo
- Publication number
- CA1190336A CA1190336A CA000406135A CA406135A CA1190336A CA 1190336 A CA1190336 A CA 1190336A CA 000406135 A CA000406135 A CA 000406135A CA 406135 A CA406135 A CA 406135A CA 1190336 A CA1190336 A CA 1190336A
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- Prior art keywords
- display
- time
- signal
- signals
- display apparatus
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R13/00—Arrangements for displaying electric variables or waveforms
- G01R13/20—Cathode-ray oscilloscopes
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Controls And Circuits For Display Device (AREA)
- Measurement Of Current Or Voltage (AREA)
- Holo Graphy (AREA)
- Radar Systems Or Details Thereof (AREA)
Abstract
Abstract of the Disclosure A waveform measurement and display apparatus com-prises a pair of signal-processing channels in addi-tion to a sweep generator arranged so as to provide both Y-T and X-Y display modes. A time marker gener-ator system is provided to insert time markers into the same relative time positions of the respective Y-T
and X-Y displays so as to precisely ascertain the time relationship between the two displays. Additionally, such time markers may be inserted into corresponding time positions for expanded and unexpanded waveforms in the Y-T display mode so as to precisely ascertain the relative time position therebetween.
and X-Y displays so as to precisely ascertain the time relationship between the two displays. Additionally, such time markers may be inserted into corresponding time positions for expanded and unexpanded waveforms in the Y-T display mode so as to precisely ascertain the relative time position therebetween.
Description
WAVE~'ORM Ml'.ASUREMF.Nrl` ,r\ND DISPI,~Y APPARA'rUS
Background of the_Inven-tion A waveform rneasuremerl-t and display appara-tus, such as a transien-t recorder, waveform diyitizer, or a digi-tal storage oscilloscope, receives one or more analog electrical signals, converts such signals to digital form and stores -them in waveform mernory for subsequent retrieval and conversion back to analog form for display. Because the signals are digitized and storecl, various processing and display modes may be implemented. For example, in a so--called pretrigger mode, signal seqments which occur prior -to a trigger event may be measured. Moreover, the stored waveforms may be processed by a compu-ter -to provide mathernatical analysis thereof. For measuring graphic (or character) signals COrlSiSting of X (horizontal) and Y (vertical) coordinates, or for measuring timing components or phase relationships of two or more analog signals, an X-Y display may be provided.
In the case of a conventional waveform measure--ment apparatus which receives and digitizes two analog input signals and stores the digitized signals in two respective memory areas, the digital signals from the two memory areas are subse~uently converted into ana--log output signals, and then applied respectively to the X-Y axes of a display device, such as a cathode-ray tube, to provide the X-Y display. ~owever, it is often difficult to discern the time relationship be-tween the two input signals from only the X-Y display.
The conventional waveforrn measurement apparatus can display the two input signals simultaneously in a Y-T
(wherein Y is amplitude and T is time) display mode so that the time relationship of -the two input signals may be analyzed. However, it is difficult to extrapo-late a mental image of the X-Y display frorn the ~--T
3~
display of the two input signals. In addition, the conventional waveform measurement apparatus has the capability of expanding the Y-T display horizontally; that is, the time axis of the ~-~ display can be expanded, but is is difficult to discern the time relationship between the expanded and unexpanded waveforms.
Summary of the Invention In accordance with the present invention, a wavef~rm measurement and display apparatus is provided in which the foregoing disadvantages are overcome.
In accordance with an aspect of the invention there is provided a waveform measurement and display apparatus comprising means for receiving and processing first and second electrical signals; means for selectively providing a first display of at least one of said signals along a time axis and a second display of said first signal along a first axis with respect to said second signal along a second axis normal to said first axis; and means for producing time markers at corresponding time positions of said first and second displays.
In a preferred embodiment, the apparatus comprises a pair of signal-processing channels in addition to a sweep generator arranged so as to provide both Y T and X-Y
display modes. In the Y-T display mode, either of the pair of signal-processing channels may be selected to coact with the sweep generator to provide a display, and in the X-Y display mode, one of the signal-processing channels may be selected to provide the X signal while the other provides the Y signal. In addition, time markers in the form of lines or intensified dots may be generated and inserted into the same relative time positons of the respective X-Y and Y~T displays so as to precisely ascertain the time relationship between the two displays.
Furthermore, time markers may be inserted into the same relative time positions for expanded and unexpanded ~2a-waveforrns in the Y-~' display mode so as to precisely ascertain the relative time position therebetween.
It is therefore one object of the present invention to provide a novel waveform measurement and display apparatus capable of discerning the time relat:ionship between an X-Y
display of two analog input signals and a Y-T display of at least one of the two input signa3.s.
.
.
_3~
It is another object of the present Invention to provide a waveform measurement and display appara-tus in which the tirne relationship between expanded and un-expanded waveforrns may be prec:isely ascer-tained.
Other objects, advantages, and fea-tures of the present invention will become apparent to those having ordinary skill in -the art upon a reading of the following description when taken in conjunction with the drawings.
Drawings FIG. l is a block diagram of a preferred embodi-ment in accordance wi-th the present invention;
FIG. 2 shows -the allotment of memory space for the X-Y display random access memories of FIG. l;
FIG. 3 shows a typical dual-channel waveform dis-play;
FIG. 4 shows a timing diagram for use in explain-ing the operation of FIG. 1;
FIG. 5 shows a Y-T waveform display and an X-Y
display, both of which have -time markers inserted at the same relative time position; and FIG. 6 shows a display of expanded and unexpanded waveforms each having time markers inserted into the same relative time positions.
Detailed D scription of the Invention Turning now to the drawings, there is shown in FIG. 1 a block diagr~m of a preferred embodiment of a dual-channel waveform measurement and display appa-ratus in accordance with the present invention. An analog signal at Channel 1 (C~ll) input terminal lO is 3~.~
"
applied throl~g`rl a pro~rarllmable at;tenuator 12 and a buf`fer arnplifier 14 to ar) analog--to--digital converter (AVC) 16. Simil.arly, an (3nalog signal at the C~12 i.nput terrninal 18 is applied through a programmable attenu-ator 20 and a buffer amplifler 22 to ADC 24. The attenuation ratios of attenuators 12 and 20 are select-able and are controlled by command signals from a main bus 30, which includes data, address, and control lines. Trigger circui.t 15 receives the outputs from amplifi.ers 14 and 22 so that a -trigger point on either of the two analog input signals may be de-tected.
Trigger circuit 15 rnay suitably include a prograrrlrnable counter which starts to count a clock signal when the trigger point is detec-ted~ and in accordance with conventional practice a delay trigger (pretrigger) is available. Trigger circui-t 15 receives trigger level data and delay time data (for the internal program-mable counter) from the bus 30, and in turn outputs a trigger signal on bus 30. ADCs 16 and 24 convert the analog input signals into 8-bit digital signals which are applied to random-access memories (RAMs) 26 and 28, respectively. These RAMs may suitably be half-areas of a single RAM. RAM 26 further receives data and a write/read (W/R) control signal from bus 30, and applies the 8-bit ou-tput to bus 30 and to a multi-plexer (MUX) 32. RAM 28 further receives data and the W/R control signal from bus 30, and applies the 8-bit output to bus 30 and MUXs 32 and 34. Selection control signals from bus 30 are applied to MUXs 32 and 34, and the outputs therefrom are applied to digital-to-analog converters (DACs) 36 and 38, respecti.vely. A surmning circuit 40 adds the output from DAC 36 to the output from DAC 42, which receives offse-t da-ta from bus 30, and the output frorn surnmi.ng circuit 40 is applied through push-pull output amplifier 44 to the Y-axis of a display device such as the vertical deflection plates of a cathode-ray tube (C~T) 46. The output frorn DAC 38 is applied through a push-pull output amplifier 48 to the X-axis, such as the horizorltal deflection pla-tes of CRT 46.
A 10-bit address counter 50 receives data from bus 30 at the preset terminal thereof, and RAMs 26 and 28 receive a 10-bit address signal from either bus 30 or coun-ter 50. MUX 34 further receives the ou-tput frorn 10-bit counter 52 and two-bit data from bus 30. A
clock generator 54 generates clock signals, the fre-quencies of which are de-termined in accordance with data from bus 30. The clock signals are applied to the counter portion of trigger circuit 15, ADCs 16 and 24, counters 50 and 52, and Z-axis amplifier 56, the output of which is applied to the grid of CRT 46. A
central processing unit (CPU) 58 which may suitably be a microprocessor, is connected to bus 30 along with a CPU RAM 60, read-only memory (ROM) 62 and a keyboard 64. RAM 60 is used as a temporary memory for CPU 58, and ROM 62 stores firmware for controlling CPU 58.
Ke,vboard 64 controls the selectable attenuation ratios of attenuators 12 and 20, the trigger level and posi-tion of trigger circuit 15, the clock frequency of clock generator 54, the W/R mode of RAMs 26 and 28, MUXs 32 and 34, etc., via CPU 58.
The operation of the apparatus of FIG. 1 is as follows. In the writing mode, the user enters into the keyboard 64 the deslred attenuation ratios of attenu-ators 12 and 20, the trigger level and position of trigger circuit 15 and frequency of clock generator 54. In execution, RAMs 26 and 28 receive a write command signal f'rom bus 30. The analog input signals at terminals 10 and 18 are attenuated to proper ampli-tudes and applied to buffer amplifiers 14 and 22. ADCs 16 and 24 convert the analog outputs from amplifiers 14 and 22 into respec-tive 8-bit digital signals, and the conversion speeds of these ADCs are determined by the cloclc frequency from cloclc generator 54. Counter courlts the clock signal -to produce a sequential address signal. It should be note~ that the clock signal to counter 50 is synchronized with the clock signal to ADCs 16 and 2~,. RAMs 26 and 28 store the 8-bit digital ou-tputs from ADCs 16 and 24, respec-tively, in accordance with the address signal from counter 50. FIG. 2 shows memory maps for RAMs 26 and 28, and as can be seen, the memory space includes memory areas W for waveforms (the outputs frorn ADCs 16 and 24), areas CU for cursors and areas CH for char-acters. It should be noted that the outputs from ADCs 16 and 2~ are stored in memory areas W of RAMs 26 and 28. Memory areas CH store the character inforrnation from bus 30, and such character information indicates in alphanumeric form the setting conditions such as the attenuation ratios, the clock frequency (time per division) or the like.
When the display mode is selected, CPU 58 applies the read control signal to RAMs 26 and 28 via bus 30.
In the ~-T display mode, MUX 34 selects the output from counter 52, which counts the clock signal from clock generator 54 to produce a 10-bit digital signal.
DAC 38 converts this digital signal into an analog signal to produce a ramp signal to drive the horizon-tal sweep. In other words, the combination of counter 52 and DAC 38 comprises a sweep generator. During a first cycle of the sweep signal, MUX 32 selects RAM
26. During a second cyc]e of the sweep signal, MUX 32 selects the output from R~ 28. The output digital signal from MUX 32 is converted into an analog signal by DAC 36, and applied to CRT 46 through summing circuit 40 and output amplifier 44. DAC 42 generates an offset signal in response to the command from bus 30 so that the waveforrns stored in RAMs 26 and 28 are displayecl at different vertical positions on the screen of CRT 46 as shown in FIG. 3. In FIG. 3, C}ll and C~12 indicate the waveforms stored in RAMs 26 and 28, respectively, and any charact,er inforrnation is not shown because it is not germane to this discussion.
The abo~e operations are controlled in accordance with CPU 58 and -the firmware stored in ROM 62.
In the X-Y display mode, MUX 32 selects RAM 26 and MUX 34 selects RAM 28; that is, the waveform stored in RAM 28 becornes the X-axis signal and the waveform stored in RAM 26 becomes the Y-axis signal.
DAC 42 generates the offset signal in thi,s mode.
When the apparatus user wishes to discern the time relationship between the X-Y display and the Y-T
display, both the Y-T and X-Y displays and cursors (markers) are displayed simultaneously as will be seen. The user selects the cursor point via keyboard 64, and the 10-bit address signal (corresponding to a point on the time axis of the waveform) of the cursor point is stored in RAM 60. The 8-bit data of RAM 26 at the cursor poi,nt is transferred to the memory area CU
of RAM 26, and the 8-bit portion of the 10-bit cursor address signal in RAM 60 is transferred to the memory area CU of RAM 28 under control of CPU 58. It should be noted that the memory area CU may be one word (8-bit) capacity.
FIG. 4 is a time chart illustrating the X-axis and Y-axis signals applied to output amplifiers 44 and ~8. At time to~ MUXs 32 and 34 select the outputs of RAMs 26 and 28, respectively. Memory area W of RAM 26 is addressed in sequence to read out the stored signal representations, and counter 52 counts the clock sig-nal to produce the sweep signal as discussed herein-above, so that the Y-T display of the waveform in RAM
Background of the_Inven-tion A waveform rneasuremerl-t and display appara-tus, such as a transien-t recorder, waveform diyitizer, or a digi-tal storage oscilloscope, receives one or more analog electrical signals, converts such signals to digital form and stores -them in waveform mernory for subsequent retrieval and conversion back to analog form for display. Because the signals are digitized and storecl, various processing and display modes may be implemented. For example, in a so--called pretrigger mode, signal seqments which occur prior -to a trigger event may be measured. Moreover, the stored waveforms may be processed by a compu-ter -to provide mathernatical analysis thereof. For measuring graphic (or character) signals COrlSiSting of X (horizontal) and Y (vertical) coordinates, or for measuring timing components or phase relationships of two or more analog signals, an X-Y display may be provided.
In the case of a conventional waveform measure--ment apparatus which receives and digitizes two analog input signals and stores the digitized signals in two respective memory areas, the digital signals from the two memory areas are subse~uently converted into ana--log output signals, and then applied respectively to the X-Y axes of a display device, such as a cathode-ray tube, to provide the X-Y display. ~owever, it is often difficult to discern the time relationship be-tween the two input signals from only the X-Y display.
The conventional waveforrn measurement apparatus can display the two input signals simultaneously in a Y-T
(wherein Y is amplitude and T is time) display mode so that the time relationship of -the two input signals may be analyzed. However, it is difficult to extrapo-late a mental image of the X-Y display frorn the ~--T
3~
display of the two input signals. In addition, the conventional waveform measurement apparatus has the capability of expanding the Y-T display horizontally; that is, the time axis of the ~-~ display can be expanded, but is is difficult to discern the time relationship between the expanded and unexpanded waveforms.
Summary of the Invention In accordance with the present invention, a wavef~rm measurement and display apparatus is provided in which the foregoing disadvantages are overcome.
In accordance with an aspect of the invention there is provided a waveform measurement and display apparatus comprising means for receiving and processing first and second electrical signals; means for selectively providing a first display of at least one of said signals along a time axis and a second display of said first signal along a first axis with respect to said second signal along a second axis normal to said first axis; and means for producing time markers at corresponding time positions of said first and second displays.
In a preferred embodiment, the apparatus comprises a pair of signal-processing channels in addition to a sweep generator arranged so as to provide both Y T and X-Y
display modes. In the Y-T display mode, either of the pair of signal-processing channels may be selected to coact with the sweep generator to provide a display, and in the X-Y display mode, one of the signal-processing channels may be selected to provide the X signal while the other provides the Y signal. In addition, time markers in the form of lines or intensified dots may be generated and inserted into the same relative time positons of the respective X-Y and Y~T displays so as to precisely ascertain the time relationship between the two displays.
Furthermore, time markers may be inserted into the same relative time positions for expanded and unexpanded ~2a-waveforrns in the Y-~' display mode so as to precisely ascertain the relative time position therebetween.
It is therefore one object of the present invention to provide a novel waveform measurement and display apparatus capable of discerning the time relat:ionship between an X-Y
display of two analog input signals and a Y-T display of at least one of the two input signa3.s.
.
.
_3~
It is another object of the present Invention to provide a waveform measurement and display appara-tus in which the tirne relationship between expanded and un-expanded waveforrns may be prec:isely ascer-tained.
Other objects, advantages, and fea-tures of the present invention will become apparent to those having ordinary skill in -the art upon a reading of the following description when taken in conjunction with the drawings.
Drawings FIG. l is a block diagram of a preferred embodi-ment in accordance wi-th the present invention;
FIG. 2 shows -the allotment of memory space for the X-Y display random access memories of FIG. l;
FIG. 3 shows a typical dual-channel waveform dis-play;
FIG. 4 shows a timing diagram for use in explain-ing the operation of FIG. 1;
FIG. 5 shows a Y-T waveform display and an X-Y
display, both of which have -time markers inserted at the same relative time position; and FIG. 6 shows a display of expanded and unexpanded waveforms each having time markers inserted into the same relative time positions.
Detailed D scription of the Invention Turning now to the drawings, there is shown in FIG. 1 a block diagr~m of a preferred embodiment of a dual-channel waveform measurement and display appa-ratus in accordance with the present invention. An analog signal at Channel 1 (C~ll) input terminal lO is 3~.~
"
applied throl~g`rl a pro~rarllmable at;tenuator 12 and a buf`fer arnplifier 14 to ar) analog--to--digital converter (AVC) 16. Simil.arly, an (3nalog signal at the C~12 i.nput terrninal 18 is applied through a programmable attenu-ator 20 and a buffer amplifler 22 to ADC 24. The attenuation ratios of attenuators 12 and 20 are select-able and are controlled by command signals from a main bus 30, which includes data, address, and control lines. Trigger circui.t 15 receives the outputs from amplifi.ers 14 and 22 so that a -trigger point on either of the two analog input signals may be de-tected.
Trigger circuit 15 rnay suitably include a prograrrlrnable counter which starts to count a clock signal when the trigger point is detec-ted~ and in accordance with conventional practice a delay trigger (pretrigger) is available. Trigger circui-t 15 receives trigger level data and delay time data (for the internal program-mable counter) from the bus 30, and in turn outputs a trigger signal on bus 30. ADCs 16 and 24 convert the analog input signals into 8-bit digital signals which are applied to random-access memories (RAMs) 26 and 28, respectively. These RAMs may suitably be half-areas of a single RAM. RAM 26 further receives data and a write/read (W/R) control signal from bus 30, and applies the 8-bit ou-tput to bus 30 and to a multi-plexer (MUX) 32. RAM 28 further receives data and the W/R control signal from bus 30, and applies the 8-bit output to bus 30 and MUXs 32 and 34. Selection control signals from bus 30 are applied to MUXs 32 and 34, and the outputs therefrom are applied to digital-to-analog converters (DACs) 36 and 38, respecti.vely. A surmning circuit 40 adds the output from DAC 36 to the output from DAC 42, which receives offse-t da-ta from bus 30, and the output frorn surnmi.ng circuit 40 is applied through push-pull output amplifier 44 to the Y-axis of a display device such as the vertical deflection plates of a cathode-ray tube (C~T) 46. The output frorn DAC 38 is applied through a push-pull output amplifier 48 to the X-axis, such as the horizorltal deflection pla-tes of CRT 46.
A 10-bit address counter 50 receives data from bus 30 at the preset terminal thereof, and RAMs 26 and 28 receive a 10-bit address signal from either bus 30 or coun-ter 50. MUX 34 further receives the ou-tput frorn 10-bit counter 52 and two-bit data from bus 30. A
clock generator 54 generates clock signals, the fre-quencies of which are de-termined in accordance with data from bus 30. The clock signals are applied to the counter portion of trigger circuit 15, ADCs 16 and 24, counters 50 and 52, and Z-axis amplifier 56, the output of which is applied to the grid of CRT 46. A
central processing unit (CPU) 58 which may suitably be a microprocessor, is connected to bus 30 along with a CPU RAM 60, read-only memory (ROM) 62 and a keyboard 64. RAM 60 is used as a temporary memory for CPU 58, and ROM 62 stores firmware for controlling CPU 58.
Ke,vboard 64 controls the selectable attenuation ratios of attenuators 12 and 20, the trigger level and posi-tion of trigger circuit 15, the clock frequency of clock generator 54, the W/R mode of RAMs 26 and 28, MUXs 32 and 34, etc., via CPU 58.
The operation of the apparatus of FIG. 1 is as follows. In the writing mode, the user enters into the keyboard 64 the deslred attenuation ratios of attenu-ators 12 and 20, the trigger level and position of trigger circuit 15 and frequency of clock generator 54. In execution, RAMs 26 and 28 receive a write command signal f'rom bus 30. The analog input signals at terminals 10 and 18 are attenuated to proper ampli-tudes and applied to buffer amplifiers 14 and 22. ADCs 16 and 24 convert the analog outputs from amplifiers 14 and 22 into respec-tive 8-bit digital signals, and the conversion speeds of these ADCs are determined by the cloclc frequency from cloclc generator 54. Counter courlts the clock signal -to produce a sequential address signal. It should be note~ that the clock signal to counter 50 is synchronized with the clock signal to ADCs 16 and 2~,. RAMs 26 and 28 store the 8-bit digital ou-tputs from ADCs 16 and 24, respec-tively, in accordance with the address signal from counter 50. FIG. 2 shows memory maps for RAMs 26 and 28, and as can be seen, the memory space includes memory areas W for waveforms (the outputs frorn ADCs 16 and 24), areas CU for cursors and areas CH for char-acters. It should be noted that the outputs from ADCs 16 and 2~ are stored in memory areas W of RAMs 26 and 28. Memory areas CH store the character inforrnation from bus 30, and such character information indicates in alphanumeric form the setting conditions such as the attenuation ratios, the clock frequency (time per division) or the like.
When the display mode is selected, CPU 58 applies the read control signal to RAMs 26 and 28 via bus 30.
In the ~-T display mode, MUX 34 selects the output from counter 52, which counts the clock signal from clock generator 54 to produce a 10-bit digital signal.
DAC 38 converts this digital signal into an analog signal to produce a ramp signal to drive the horizon-tal sweep. In other words, the combination of counter 52 and DAC 38 comprises a sweep generator. During a first cycle of the sweep signal, MUX 32 selects RAM
26. During a second cyc]e of the sweep signal, MUX 32 selects the output from R~ 28. The output digital signal from MUX 32 is converted into an analog signal by DAC 36, and applied to CRT 46 through summing circuit 40 and output amplifier 44. DAC 42 generates an offset signal in response to the command from bus 30 so that the waveforrns stored in RAMs 26 and 28 are displayecl at different vertical positions on the screen of CRT 46 as shown in FIG. 3. In FIG. 3, C}ll and C~12 indicate the waveforms stored in RAMs 26 and 28, respectively, and any charact,er inforrnation is not shown because it is not germane to this discussion.
The abo~e operations are controlled in accordance with CPU 58 and -the firmware stored in ROM 62.
In the X-Y display mode, MUX 32 selects RAM 26 and MUX 34 selects RAM 28; that is, the waveform stored in RAM 28 becornes the X-axis signal and the waveform stored in RAM 26 becomes the Y-axis signal.
DAC 42 generates the offset signal in thi,s mode.
When the apparatus user wishes to discern the time relationship between the X-Y display and the Y-T
display, both the Y-T and X-Y displays and cursors (markers) are displayed simultaneously as will be seen. The user selects the cursor point via keyboard 64, and the 10-bit address signal (corresponding to a point on the time axis of the waveform) of the cursor point is stored in RAM 60. The 8-bit data of RAM 26 at the cursor poi,nt is transferred to the memory area CU
of RAM 26, and the 8-bit portion of the 10-bit cursor address signal in RAM 60 is transferred to the memory area CU of RAM 28 under control of CPU 58. It should be noted that the memory area CU may be one word (8-bit) capacity.
FIG. 4 is a time chart illustrating the X-axis and Y-axis signals applied to output amplifiers 44 and ~8. At time to~ MUXs 32 and 34 select the outputs of RAMs 26 and 28, respectively. Memory area W of RAM 26 is addressed in sequence to read out the stored signal representations, and counter 52 counts the clock sig-nal to produce the sweep signal as discussed herein-above, so that the Y-T display of the waveform in RAM
2~ (CHl) is displayed on the screen of CRT 46 as shown in FIG. 5. A period between times tl and t2 is a rest period for the next step. At time t2, address counter 50 addresses memory areas CU of RAr~s 26 and 28, and MUX 3~. selects RAM 28 and bus 30. 'I`hus, OAC 36 receives -the waveform da-ta at the cursor point, and DAC 38 receives -the 8-bit portion of the 10-bit c~rsor address signal from RAM 28 and -the other two-bit portion from RAM 60 through bus 30. DACs 36 and 38 generate the cursor informat-ion during the period be-tween times t2 and t3, and the electron beam bombards the same position o-f the screen of CRT 46 -to indicate cursor 66 wi-th intensity modula-tion. Thus cursor 66 appears as an intensified dot on the waveform display.
The period be-tween times t3 and -t4 is a rest period for the nex-t s-tep. The characters stored in memory areas CH of RAMs 26 and 28 may be displayed as well;
however, -this operation is omitted in this description because it is not germane to the invention.
At time t4, address counter 50 starts to address memory areas W of RAMs 26 and 28 in sequence in order to provide an X-Y display on the screen of CRT 46 as shown in FIG. 5. As described earlier, -the waveforms in RAMs 26 and 28 are the Y-axis and X-axis signals re-spectively. DAC 42 applies an offset signal to summing circuit 40 in order -to control the vertical position of the X-Y display. Thus the contents of memory areas W of RAMs 26 and 28 are read out between times t4 and t5, and at time t5 the rest period starts for the next step. At time t6, CPU 58 presets address counter 50 in accordance with the cursor address signal in RAM 60 and counter 50 addresses the cursor point in memory areas W of RAMs 26 and 28. DACs 36 and 38 generate cursor information during the period between times t6 and -t7 and the electron beam borrlbards the same posi-tion of the screen of CRT 46 to indicate cursor 68 with intensity modulation. It should be noted that cursor 66 and 68 indicate -the same rela-tive time position of the Y-T display of -the signal in Channel 1 in this instance, and the X-Y display of the signals of Channels 1 and 2. The above operations are con-
The period be-tween times t3 and -t4 is a rest period for the nex-t s-tep. The characters stored in memory areas CH of RAMs 26 and 28 may be displayed as well;
however, -this operation is omitted in this description because it is not germane to the invention.
At time t4, address counter 50 starts to address memory areas W of RAMs 26 and 28 in sequence in order to provide an X-Y display on the screen of CRT 46 as shown in FIG. 5. As described earlier, -the waveforms in RAMs 26 and 28 are the Y-axis and X-axis signals re-spectively. DAC 42 applies an offset signal to summing circuit 40 in order -to control the vertical position of the X-Y display. Thus the contents of memory areas W of RAMs 26 and 28 are read out between times t4 and t5, and at time t5 the rest period starts for the next step. At time t6, CPU 58 presets address counter 50 in accordance with the cursor address signal in RAM 60 and counter 50 addresses the cursor point in memory areas W of RAMs 26 and 28. DACs 36 and 38 generate cursor information during the period between times t6 and -t7 and the electron beam borrlbards the same posi-tion of the screen of CRT 46 to indicate cursor 68 with intensity modulation. It should be noted that cursor 66 and 68 indicate -the same rela-tive time position of the Y-T display of -the signal in Channel 1 in this instance, and the X-Y display of the signals of Channels 1 and 2. The above operations are con-
3~=3 trol~Led In accordance with CPU 58 and the firrrlware i.n ~OM 62. If the user changes the cursor to another position via keyboard 6~, the cursor address signal in RAM 60 is rewritten and the above operations repea-t.
s FIG. 6 illustrates the screen of CRT 46 in the horizontal magnification mode. In this instance, RAM
26 has stored therein a digi-tized triangle waveform.
Unmagnified waveform 70 and cursor 72 are displayed in the same rnanner as described for -the Y-T display. In order to display magnified waveform 74, the clock si.gnal from clock generator 54 is changed -to a higher frequency signal in response to the command from bus 30. The magnification ratio is determined by the ratio of the read out clock frequency of waveforms 70 and 74. Cursor 76 is displayed in the same manner de-scribed earlier. It should be no-ted that the timing of cursor 76 corresponds to that of cursor 72. Cursor 72 may be moved along the waveform in accordance with a cursor command from keyboard 64; however, cursor 76 is stable at the predetermined horizontal posi-tion while waveform 74 moves horizontally in accordance with the cursor command because the starting address of counter 50 is preset by CPU 58 in accordance with the cursor position for waveform 74.
As understood from the foregoing description, the waveform measurement apparatus of the present inven-tion is capable of di.splaying both the X-Y display of two input signals and the Y--T display of at leas-t one of the two input signals against an internally gener-ated sweep. Moreover, time markers may be inserted into the same relative time positions of the X-Y and Y-T displays, so that it is easy to discern the time relationship between the X-Y and Y-T displays. The apparatus in accordance with the present invention can also precisely ascertain the time relationship between the hori~ontally magni.fied and unmagnified waveforMs - ~ o -in the Y--T display mode. rrhese operations are con-troll.ed by CPU 58 and the firrmware i.n ROM 62.
While -the foregoing description pertains to a pre-ferred ernbodiment of the present invention, it w:ill be apparent to -those having ordinary skill in the art that various rnodifications may be made wi-thout depart-i.ng from -the scope and spirit of the present inven-tion. For exarnple, while the time markers are dis-cussed in terms of intensi-ty rnodulated dots, such -time markers may also be a cursor line or a spike. These -types of markers may be generated in accordance with well-known -techniques.
s FIG. 6 illustrates the screen of CRT 46 in the horizontal magnification mode. In this instance, RAM
26 has stored therein a digi-tized triangle waveform.
Unmagnified waveform 70 and cursor 72 are displayed in the same rnanner as described for -the Y-T display. In order to display magnified waveform 74, the clock si.gnal from clock generator 54 is changed -to a higher frequency signal in response to the command from bus 30. The magnification ratio is determined by the ratio of the read out clock frequency of waveforms 70 and 74. Cursor 76 is displayed in the same manner de-scribed earlier. It should be no-ted that the timing of cursor 76 corresponds to that of cursor 72. Cursor 72 may be moved along the waveform in accordance with a cursor command from keyboard 64; however, cursor 76 is stable at the predetermined horizontal posi-tion while waveform 74 moves horizontally in accordance with the cursor command because the starting address of counter 50 is preset by CPU 58 in accordance with the cursor position for waveform 74.
As understood from the foregoing description, the waveform measurement apparatus of the present inven-tion is capable of di.splaying both the X-Y display of two input signals and the Y--T display of at leas-t one of the two input signals against an internally gener-ated sweep. Moreover, time markers may be inserted into the same relative time positions of the X-Y and Y-T displays, so that it is easy to discern the time relationship between the X-Y and Y-T displays. The apparatus in accordance with the present invention can also precisely ascertain the time relationship between the hori~ontally magni.fied and unmagnified waveforMs - ~ o -in the Y--T display mode. rrhese operations are con-troll.ed by CPU 58 and the firrmware i.n ROM 62.
While -the foregoing description pertains to a pre-ferred ernbodiment of the present invention, it w:ill be apparent to -those having ordinary skill in the art that various rnodifications may be made wi-thout depart-i.ng from -the scope and spirit of the present inven-tion. For exarnple, while the time markers are dis-cussed in terms of intensi-ty rnodulated dots, such -time markers may also be a cursor line or a spike. These -types of markers may be generated in accordance with well-known -techniques.
Claims (4)
1. A waveform measurement and display apparatus comprising:
means for receiving and processing first and second electrical signals;
means for selectively providing a first display of at least one of said signals along a time axis and a second display of said first signal along a first axis with respect to said second signal along a second axis normal to said first axis; and means for producing time markers at corresponding time positions of said first and second displays.
means for receiving and processing first and second electrical signals;
means for selectively providing a first display of at least one of said signals along a time axis and a second display of said first signal along a first axis with respect to said second signal along a second axis normal to said first axis; and means for producing time markers at corresponding time positions of said first and second displays.
2. A waveform measurement and display apparatus in accordance with claim 1 further comprising means for changing the timing of at least one of said signals so as to provide expanded and unexpanded dis-plays thereof, wherein said time marker producing means also produces time markers at corresponding time positions of said expanded and unexpanded displays.
3. A waveform measurement and display apparatus in accordance with claim 1 wherein said means for receiving and processing first and second electrical signals comprises a first and a second signal-process-ing channel, each including means for converting a respective signal to digital representations thereof, storing said representations, and converting said re-presentations to analog values for display.
4. A waveform measurement and display apparatus in accordance with claim 1 wherein said means for producing time markers comprises means for selecting relative time positions of one or more signals and generating intensified dots corresponding thereto.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10493881A JPS587564A (en) | 1981-07-03 | 1981-07-03 | Measuring device for wave-form |
JPP104938/81 | 1981-07-03 |
Publications (1)
Publication Number | Publication Date |
---|---|
CA1190336A true CA1190336A (en) | 1985-07-09 |
Family
ID=14394026
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA000406135A Expired CA1190336A (en) | 1981-07-03 | 1982-06-28 | Waveform measurement and display apparatus |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPS587564A (en) |
CA (1) | CA1190336A (en) |
DE (1) | DE3224836C2 (en) |
FR (1) | FR2509051B1 (en) |
GB (1) | GB2103459B (en) |
NL (1) | NL187135C (en) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2119607B (en) * | 1982-03-11 | 1986-02-12 | Lucas Ind Plc | Multi-channel display apparatus |
US4540938A (en) * | 1983-01-21 | 1985-09-10 | Tektronix, Inc. | Displaying waveforms |
US4897794A (en) * | 1987-07-21 | 1990-01-30 | Egg Co., Ltd. | Impulse coil tester |
JP4517757B2 (en) * | 2004-07-13 | 2010-08-04 | 横河電機株式会社 | Waveform measuring device |
CN100409307C (en) | 2005-01-18 | 2008-08-06 | 深圳迈瑞生物医疗电子股份有限公司 | Multi-channel waveform display method |
JP4883347B2 (en) * | 2006-03-27 | 2012-02-22 | 横河電機株式会社 | XY waveform display device |
JP5413796B2 (en) * | 2008-11-25 | 2014-02-12 | 横河電機株式会社 | Waveform measuring device |
DE102013214819A1 (en) | 2012-09-10 | 2014-05-15 | Rohde & Schwarz Gmbh & Co. Kg | Line for marking common times |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE910318C (en) * | 1940-08-03 | 1954-04-29 | Aeg | Circuit arrangement for cathode ray oscillographs, in which certain parts of the measuring process are recorded in an extended manner |
US3765009A (en) * | 1972-03-01 | 1973-10-09 | Gte Sylvania Inc | Apparatus for displaying waveforms of time-varying signals emloying a television type display |
DE2401397A1 (en) * | 1974-01-12 | 1975-07-24 | Hartmann & Braun Ag | METHOD OF MARKING MEASUREMENT CURVES DISPLAYED ON THE SCREEN OF A VISUALIZER |
-
1981
- 1981-07-03 JP JP10493881A patent/JPS587564A/en active Granted
-
1982
- 1982-06-21 GB GB08217934A patent/GB2103459B/en not_active Expired
- 1982-06-28 CA CA000406135A patent/CA1190336A/en not_active Expired
- 1982-06-28 NL NL8202611A patent/NL187135C/en not_active IP Right Cessation
- 1982-07-02 DE DE19823224836 patent/DE3224836C2/en not_active Expired
- 1982-07-05 FR FR8211766A patent/FR2509051B1/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
FR2509051A1 (en) | 1983-01-07 |
GB2103459B (en) | 1985-01-09 |
JPS587564A (en) | 1983-01-17 |
NL8202611A (en) | 1983-02-01 |
DE3224836C2 (en) | 1984-08-16 |
JPS6112548B2 (en) | 1986-04-09 |
NL187135C (en) | 1991-06-03 |
GB2103459A (en) | 1983-02-16 |
NL187135B (en) | 1991-01-02 |
FR2509051B1 (en) | 1985-10-11 |
DE3224836A1 (en) | 1983-01-20 |
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