CA1147419A - Logic system for selectively reconfiguring an intersystem communication link - Google Patents

Logic system for selectively reconfiguring an intersystem communication link

Info

Publication number
CA1147419A
CA1147419A CA000338370A CA338370A CA1147419A CA 1147419 A CA1147419 A CA 1147419A CA 000338370 A CA000338370 A CA 000338370A CA 338370 A CA338370 A CA 338370A CA 1147419 A CA1147419 A CA 1147419A
Authority
CA
Canada
Prior art keywords
isl
signal
bus
input
local
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000338370A
Other languages
English (en)
French (fr)
Inventor
Kenneth E. Bruce
John W. Conway
Ralph M. Lombardo, Jr.
Bruce H. Tarbox
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Inc filed Critical Honeywell Information Systems Inc
Application granted granted Critical
Publication of CA1147419A publication Critical patent/CA1147419A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/404—Coupling between buses using bus bridges with address mapping
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/4045—Coupling between buses using bus bridges where the bus bridge performs an extender function

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)
  • Multi Processors (AREA)
CA000338370A 1978-10-31 1979-10-25 Logic system for selectively reconfiguring an intersystem communication link Expired CA1147419A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US95638178A 1978-10-31 1978-10-31
US956,381 1978-10-31

Publications (1)

Publication Number Publication Date
CA1147419A true CA1147419A (en) 1983-05-31

Family

ID=25498165

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000338370A Expired CA1147419A (en) 1978-10-31 1979-10-25 Logic system for selectively reconfiguring an intersystem communication link

Country Status (4)

Country Link
JP (1) JPS5582342A (enrdf_load_stackoverflow)
AU (1) AU536784B2 (enrdf_load_stackoverflow)
BE (1) BE879667A (enrdf_load_stackoverflow)
CA (1) CA1147419A (enrdf_load_stackoverflow)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NZ226733A (en) * 1987-12-21 1990-05-28 Honeywell Bull Coupling incompatible cpu to data processing system
EP0321694B1 (en) * 1987-12-21 1995-06-07 Bull HN Information Systems Inc. Method for a Data processing system using incompatible central processing unit/operating system combinations
CN117056149B (zh) * 2023-10-08 2024-02-02 飞腾信息技术有限公司 一种内存测试方法、装置、计算设备及存储介质

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5152250A (ja) * 1974-11-01 1976-05-08 Hitachi Ltd Basukanketsugosochi
FR2296221A1 (fr) * 1974-12-27 1976-07-23 Ibm France Systeme de traitement du signal

Also Published As

Publication number Publication date
BE879667A (fr) 1980-02-15
AU536784B2 (en) 1984-05-24
JPS5582342A (en) 1980-06-21
AU5232279A (en) 1980-05-15
JPH0155502B2 (enrdf_load_stackoverflow) 1989-11-24

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Legal Events

Date Code Title Description
MKEX Expiry