CA1134051A - High speed digital computer system - Google Patents
High speed digital computer systemInfo
- Publication number
- CA1134051A CA1134051A CA339,190A CA339190A CA1134051A CA 1134051 A CA1134051 A CA 1134051A CA 339190 A CA339190 A CA 339190A CA 1134051 A CA1134051 A CA 1134051A
- Authority
- CA
- Canada
- Prior art keywords
- memory
- bus
- signals
- input
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
- G06F9/30043—LOAD or STORE instructions; Clear instruction
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
- G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1689—Synchronisation and timing concerns
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3818—Decoding for concurrent execution
- G06F9/3822—Parallel decoding, e.g. parallel decode units
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Dram (AREA)
- Multi Processors (AREA)
- Microcomputers (AREA)
- Bus Control (AREA)
- Executing Machine-Instructions (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA391,043A CA1130010A (en) | 1978-11-08 | 1981-11-26 | Input-output means in a computer system |
CA391,044A CA1130009A (en) | 1978-11-08 | 1981-11-26 | Microinstruction logic means |
CA391,041A CA1129557A (en) | 1978-11-08 | 1981-11-26 | Instruction pre-fetch circuitry |
CA391,042A CA1129559A (en) | 1978-11-08 | 1981-11-26 | Digital data bus system |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US959,038 | 1978-11-08 | ||
US05/959,038 US4316244A (en) | 1978-11-08 | 1978-11-08 | Memory apparatus for digital computer system |
Publications (1)
Publication Number | Publication Date |
---|---|
CA1134051A true CA1134051A (en) | 1982-10-19 |
Family
ID=25501594
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA339,190A Expired CA1134051A (en) | 1978-11-08 | 1979-11-05 | High speed digital computer system |
Country Status (8)
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56152049A (en) * | 1980-04-25 | 1981-11-25 | Toshiba Corp | Microprogram control system |
US4467417A (en) * | 1981-09-16 | 1984-08-21 | Honeywell Information Systems Inc. | Flexible logic transfer and instruction decoding system |
EP0150177A1 (en) * | 1983-07-11 | 1985-08-07 | Prime Computer, Inc. | Data processing system |
US4622630A (en) * | 1983-10-28 | 1986-11-11 | Data General Corporation | Data processing system having unique bus control protocol |
US4764896A (en) * | 1985-07-01 | 1988-08-16 | Honeywell Inc. | Microprocessor assisted memory to memory move apparatus |
US5179716A (en) * | 1986-07-02 | 1993-01-12 | Advanced Micro Devices, Inc. | Programmable expandable controller with flexible I/O |
ES2022246B3 (es) * | 1986-09-26 | 1991-12-01 | Siemens Ag | Dispositivo de carga de avance para la preparacion microprogramada y cubierta de mandos de maquina en un procesador. |
US4980850A (en) * | 1987-05-14 | 1990-12-25 | Digital Equipment Corporation | Automatic sizing memory system with multiplexed configuration signals at memory modules |
DE68925376T2 (de) * | 1988-04-20 | 1996-09-05 | Sanyo Electric Co | In Direktabbildung und in Bankabbildung wirksamer Informationsprozessor und Verfahren zum Schalten der Abbildungsschemas |
CA2011518C (en) * | 1989-04-25 | 1993-04-20 | Ronald N. Fortino | Distributed cache dram chip and control method |
US5144692A (en) * | 1989-05-17 | 1992-09-01 | International Business Machines Corporation | System for controlling access by first system to portion of main memory dedicated exclusively to second system to facilitate input/output processing via first system |
US5369767A (en) * | 1989-05-17 | 1994-11-29 | International Business Machines Corp. | Servicing interrupt requests in a data processing system without using the services of an operating system |
US5155809A (en) * | 1989-05-17 | 1992-10-13 | International Business Machines Corp. | Uncoupling a central processing unit from its associated hardware for interaction with data handling apparatus alien to the operating system controlling said unit and hardware |
US5369749A (en) * | 1989-05-17 | 1994-11-29 | Ibm Corporation | Method and apparatus for the direct transfer of information between application programs running on distinct processors without utilizing the services of one or both operating systems |
US5325517A (en) * | 1989-05-17 | 1994-06-28 | International Business Machines Corporation | Fault tolerant data processing system |
US5283868A (en) * | 1989-05-17 | 1994-02-01 | International Business Machines Corp. | Providing additional system characteristics to a data processing system through operations of an application program, transparently to the operating system |
US5113522A (en) * | 1989-05-17 | 1992-05-12 | International Business Machines Corporation | Data processing system with system resource management for itself and for an associated alien processor |
US5280474A (en) * | 1990-01-05 | 1994-01-18 | Maspar Computer Corporation | Scalable processor to processor and processor-to-I/O interconnection network and method for parallel processing arrays |
US5313590A (en) * | 1990-01-05 | 1994-05-17 | Maspar Computer Corporation | System having fixedly priorized and grouped by positions I/O lines for interconnecting router elements in plurality of stages within parrallel computer |
EP0509058A4 (en) * | 1990-01-05 | 1993-11-18 | Maspar Computer Corporation | Router chip with quad-crossbar and hyperbar personalities |
JPH05506113A (ja) * | 1990-01-05 | 1993-09-02 | マスパー・コンピューター・コーポレイション | 並列プロセッサメモリシステム |
US5301299A (en) * | 1990-06-07 | 1994-04-05 | Intel Corporation | Optimized write protocol for memory accesses utilizing row and column strobes |
KR100295074B1 (ko) * | 1992-12-22 | 2001-09-17 | 리패치 | 응용주문형집적회로인에러정정코드메모리제어기 |
JP4001461B2 (ja) * | 1999-01-25 | 2007-10-31 | 三菱電機株式会社 | プログラマブルコントローラの周辺装置 |
EP1643658A1 (en) | 2004-10-04 | 2006-04-05 | Sony Deutschland GmbH | Power line communication method |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1935390U (de) | 1965-12-06 | 1966-03-24 | Huelsta Moebelwerk Alois Huels | Scharnier fuer moebeltueren. |
US3764988A (en) * | 1971-03-01 | 1973-10-09 | Hitachi Ltd | Instruction processing device using advanced control system |
US3736566A (en) * | 1971-08-18 | 1973-05-29 | Ibm | Central processing unit with hardware controlled checkpoint and retry facilities |
FR2226079A5 (US20100056889A1-20100304-C00004.png) * | 1973-04-13 | 1974-11-08 | Honeywell Bull Soc Ind | |
US3810110A (en) * | 1973-05-01 | 1974-05-07 | Digital Equipment Corp | Computer system overlap of memory operation |
US3900836A (en) * | 1973-11-30 | 1975-08-19 | Ibm | Interleaved memory control signal handling apparatus using pipelining techniques |
JPS50128948A (US20100056889A1-20100304-C00004.png) * | 1974-03-29 | 1975-10-11 | ||
US4048623A (en) | 1974-09-25 | 1977-09-13 | Data General Corporation | Data processing system |
US4024508A (en) * | 1975-06-19 | 1977-05-17 | Honeywell Information Systems, Inc. | Database instruction find serial |
DE2537787A1 (de) | 1975-08-25 | 1977-03-03 | Computer Ges Konstanz | Modularer arbeitsspeicher fuer eine datenverarbeitungsanlage und verfahren zum durchfuehren von speicherzugriffen an diesem speicher |
US4045781A (en) * | 1976-02-13 | 1977-08-30 | Digital Equipment Corporation | Memory module with selectable byte addressing for digital data processing system |
US4156925A (en) * | 1976-04-30 | 1979-05-29 | International Business Machines Corporation | Overlapped and interleaved control store with address modifiers |
US4095265A (en) * | 1976-06-07 | 1978-06-13 | International Business Machines Corporation | Memory control structure for a pipelined mini-processor system |
US4079455A (en) * | 1976-12-13 | 1978-03-14 | Rca Corporation | Microprocessor architecture |
DE2704560C2 (de) * | 1977-02-03 | 1979-01-18 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Datenverarbeitende Anlage mit paralleler Bereitstellung und Ausführung von Maschinenbefehlen |
US4122359A (en) * | 1977-04-27 | 1978-10-24 | Honeywell Inc. | Memory protection arrangement |
US4130899A (en) * | 1977-11-25 | 1978-12-19 | Ncr Corporation | System for operating volatile memory in normal and standby modes |
US4189767A (en) * | 1978-06-05 | 1980-02-19 | Bell Telephone Laboratories, Incorporated | Accessing arrangement for interleaved modular memories |
-
1978
- 1978-11-08 US US05/959,038 patent/US4316244A/en not_active Expired - Lifetime
-
1979
- 1979-10-12 GB GB7935593A patent/GB2034944B/en not_active Expired
- 1979-10-22 NL NL7907768A patent/NL7907768A/nl not_active Application Discontinuation
- 1979-10-26 AU AU52228/79A patent/AU532100B2/en not_active Ceased
- 1979-11-03 DE DE19792944419 patent/DE2944419A1/de active Granted
- 1979-11-03 DE DE2953861A patent/DE2953861C2/de not_active Expired
- 1979-11-05 CA CA339,190A patent/CA1134051A/en not_active Expired
- 1979-11-06 FR FR7928008A patent/FR2443099B1/fr not_active Expired
- 1979-11-07 JP JP14342279A patent/JPS55102050A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JPS55102050A (en) | 1980-08-04 |
DE2953861C2 (US20100056889A1-20100304-C00004.png) | 1989-01-26 |
DE2944419A1 (de) | 1980-05-14 |
DE2953861A1 (US20100056889A1-20100304-C00004.png) | 1982-09-16 |
FR2443099A1 (fr) | 1980-06-27 |
AU532100B2 (en) | 1983-09-15 |
GB2034944A (en) | 1980-06-11 |
DE2944419C2 (US20100056889A1-20100304-C00004.png) | 1988-08-18 |
US4316244A (en) | 1982-02-16 |
NL7907768A (nl) | 1980-05-12 |
FR2443099B1 (fr) | 1988-03-25 |
GB2034944B (en) | 1982-12-22 |
AU5222879A (en) | 1980-05-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MKEX | Expiry |