CA1075366A - System for controlling address keys under interrupt conditions - Google Patents

System for controlling address keys under interrupt conditions

Info

Publication number
CA1075366A
CA1075366A CA275,542A CA275542A CA1075366A CA 1075366 A CA1075366 A CA 1075366A CA 275542 A CA275542 A CA 275542A CA 1075366 A CA1075366 A CA 1075366A
Authority
CA
Canada
Prior art keywords
processor
register
address
aak
key
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA275,542A
Other languages
English (en)
French (fr)
Inventor
Richard E. Birney
William S. Osborne
Lynn A. Graybiel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of CA1075366A publication Critical patent/CA1075366A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
  • Executing Machine-Instructions (AREA)
CA275,542A 1976-04-30 1977-04-05 System for controlling address keys under interrupt conditions Expired CA1075366A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/682,226 US4037207A (en) 1976-04-30 1976-04-30 System for controlling address keys under interrupt conditions

Publications (1)

Publication Number Publication Date
CA1075366A true CA1075366A (en) 1980-04-08

Family

ID=24738759

Family Applications (1)

Application Number Title Priority Date Filing Date
CA275,542A Expired CA1075366A (en) 1976-04-30 1977-04-05 System for controlling address keys under interrupt conditions

Country Status (9)

Country Link
US (1) US4037207A (enExample)
JP (1) JPS52132754A (enExample)
AU (1) AU507988B2 (enExample)
BR (1) BR7702778A (enExample)
CA (1) CA1075366A (enExample)
DE (1) DE2717700C2 (enExample)
FR (1) FR2349882A1 (enExample)
GB (1) GB1557118A (enExample)
SE (1) SE417553B (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4408292A (en) * 1979-09-27 1983-10-04 Sharp Kabushiki Kaisha Data print control in an electronic cash register
US4355355A (en) * 1980-03-19 1982-10-19 International Business Machines Corp. Address generating mechanism for multiple virtual spaces
US4587632A (en) * 1980-05-27 1986-05-06 At&T Bell Laboratories Lookahead stack oriented computer
US4575817A (en) * 1983-06-27 1986-03-11 International Business Machines Corporation Switching of programming routine supporting storage stacks
JPH01112450A (ja) * 1987-10-27 1989-05-01 Sharp Corp メモリ管理ユニット
US5287523A (en) * 1990-10-09 1994-02-15 Motorola, Inc. Method for servicing a peripheral interrupt request in a microcontroller
US5548746A (en) * 1993-11-12 1996-08-20 International Business Machines Corporation Non-contiguous mapping of I/O addresses to use page protection of a process

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3566358A (en) * 1968-03-19 1971-02-23 Bevier Hasbrouck Integrated multi-computer system
GB1410631A (en) * 1972-01-26 1975-10-22 Plessey Co Ltd Data processing system interrupt arrangements
US3828327A (en) * 1973-04-30 1974-08-06 Ibm Simplified storage protection and address translation under system mode control in a data processing system
US4037214A (en) * 1976-04-30 1977-07-19 International Business Machines Corporation Key register controlled accessing system

Also Published As

Publication number Publication date
DE2717700C2 (de) 1985-05-23
SE7704957L (sv) 1977-10-31
AU2474377A (en) 1978-11-09
GB1557118A (en) 1979-12-05
US4037207A (en) 1977-07-19
FR2349882B1 (enExample) 1979-03-09
JPS52132754A (en) 1977-11-07
BR7702778A (pt) 1978-02-21
DE2717700A1 (de) 1977-11-10
JPS5653782B2 (enExample) 1981-12-21
AU507988B2 (en) 1980-03-06
SE417553B (sv) 1981-03-23
FR2349882A1 (fr) 1977-11-25

Similar Documents

Publication Publication Date Title
US4037214A (en) Key register controlled accessing system
US4037215A (en) Key controlled address relocation translation system
US4038645A (en) Non-translatable storage protection control system
US4042911A (en) Outer and asynchronous storage extension system
CA1304166C (en) Software emulation of bank-switched memory using a virtual dos monitorand paged memory management
EP0171859B1 (en) Memory access control device for implementing guarded regions in a memory, and memory provided with such memory access control device
US4050094A (en) Translator lookahead controls
US4742450A (en) Method to share copy on write segment for mapped files
US5187792A (en) Method and apparatus for selectively reclaiming a portion of RAM in a personal computer system
US4456954A (en) Virtual machine system with guest architecture emulation using hardware TLB's for plural level address translations
GB2210480A (en) Flush support
JPH0769844B2 (ja) データ空間への共通アクセス装置及び方法
US4035779A (en) Supervisor address key control system
JPH01502221A (ja) コンピュータ・アドレス変換装置を備えたコンピュータ・システム
US5339417A (en) Computer system with two levels of guests
CA1078068A (en) Address key register load/store instruction system
JPH0260012B2 (enExample)
US5638532A (en) Apparatus and method for accessing SMRAM in a computer based upon a processor employing system management mode
CA1075366A (en) System for controlling address keys under interrupt conditions
US4050060A (en) Equate operand address space control system
US5459872A (en) Software control of hardware interruptions
JP3629507B2 (ja) コンピュータ・システム内で共用仮想セグメント識別を使用して共用メモリを提供するシステムおよび方法
KR890002777A (ko) 액세스 및 오류논리신호를 이용하는 주기억장치보호를 위한 장치 및 그 방법
JP2858517B2 (ja) コンピュータシステム及び同システムにおいてアドレス指定可能な拡張された記憶装置を与える方法
JPS6250863B2 (enExample)

Legal Events

Date Code Title Description
MKEX Expiry