CA1042550A - Fet read only memory using presence or absence of gates to store information and dc charge level sensing - Google Patents

Fet read only memory using presence or absence of gates to store information and dc charge level sensing

Info

Publication number
CA1042550A
CA1042550A CA206,752A CA206752A CA1042550A CA 1042550 A CA1042550 A CA 1042550A CA 206752 A CA206752 A CA 206752A CA 1042550 A CA1042550 A CA 1042550A
Authority
CA
Canada
Prior art keywords
lines
gate
series
bit
fet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA206,752A
Other languages
English (en)
French (fr)
Other versions
CA206752S (en
Inventor
Michael J. Sheehan
John F. Roemer
Dale A. Heuer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Priority to CA298,330A priority Critical patent/CA1044371A/en
Application granted granted Critical
Publication of CA1042550A publication Critical patent/CA1042550A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices

Landscapes

  • Read Only Memory (AREA)
CA206,752A 1973-08-23 1974-08-09 Fet read only memory using presence or absence of gates to store information and dc charge level sensing Expired CA1042550A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA298,330A CA1044371A (en) 1973-08-23 1978-03-06 Fet read only memory with charge level sense circuitry and selective sense line charge dumping

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US39142573A 1973-08-23 1973-08-23

Publications (1)

Publication Number Publication Date
CA1042550A true CA1042550A (en) 1978-11-14

Family

ID=23546533

Family Applications (1)

Application Number Title Priority Date Filing Date
CA206,752A Expired CA1042550A (en) 1973-08-23 1974-08-09 Fet read only memory using presence or absence of gates to store information and dc charge level sensing

Country Status (10)

Country Link
JP (1) JPS5710513B2 (xx)
BE (1) BE819134A (xx)
CA (1) CA1042550A (xx)
CH (1) CH565429A5 (xx)
DE (1) DE2439986C3 (xx)
FR (1) FR2241845B1 (xx)
GB (1) GB1456608A (xx)
IT (1) IT1015218B (xx)
NL (1) NL7409643A (xx)
SE (1) SE400846B (xx)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4025908A (en) * 1975-06-24 1977-05-24 International Business Machines Corporation Dynamic array with clamped bootstrap static input/output circuitry
JPS5341968A (en) * 1976-09-29 1978-04-15 Hitachi Ltd Semiconductor circuit
US4151603A (en) * 1977-10-31 1979-04-24 International Business Machines Corporation Precharged FET ROS array
DE2855744C3 (de) * 1978-12-22 1982-02-18 Siemens AG, 1000 Berlin und 8000 München MOS-integrierte Schaltungsanordnung zur Unterdrückung von in Wortleitungstreibern von Halbleiterspeicher fließenden Ruheströmen

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3614750A (en) * 1969-07-15 1971-10-19 Ncr Co Read-only memory circuit
DE2128014A1 (de) * 1971-06-05 1972-12-14 Ibm Deutschland Halbleiterfestwertspeicher

Also Published As

Publication number Publication date
CH565429A5 (xx) 1975-08-15
SE7410608L (xx) 1975-02-24
IT1015218B (it) 1977-05-10
DE2439986B2 (de) 1976-05-06
FR2241845A1 (xx) 1975-03-21
JPS5074348A (xx) 1975-06-19
FR2241845B1 (xx) 1976-06-25
SE400846B (sv) 1978-04-10
JPS5710513B2 (xx) 1982-02-26
GB1456608A (en) 1976-11-24
DE2439986C3 (de) 1982-04-15
DE2439986A1 (de) 1975-07-10
BE819134A (fr) 1974-12-16
NL7409643A (nl) 1975-02-25
AU7126074A (en) 1976-01-22

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