CA1036050A - Mode de fabrication d'un dispositif a semiconducteur - Google Patents
Mode de fabrication d'un dispositif a semiconducteurInfo
- Publication number
- CA1036050A CA1036050A CA217,052A CA217052A CA1036050A CA 1036050 A CA1036050 A CA 1036050A CA 217052 A CA217052 A CA 217052A CA 1036050 A CA1036050 A CA 1036050A
- Authority
- CA
- Canada
- Prior art keywords
- producing
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
- H01L29/7325—Vertical transistors having an emitter-base junction leaving at a main surface and a base-collector junction leaving at a peripheral surface of the body, e.g. mesa planar transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/117—Oxidation, selective
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/143—Shadow masking
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Element Separation (AREA)
- Local Oxidation Of Silicon (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2409910A DE2409910C3 (de) | 1974-03-01 | 1974-03-01 | Verfahren zum Herstellen einer Halbleiteranordnung |
Publications (1)
Publication Number | Publication Date |
---|---|
CA1036050A true CA1036050A (fr) | 1978-08-08 |
Family
ID=5908864
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA217,052A Expired CA1036050A (fr) | 1974-03-01 | 1974-12-30 | Mode de fabrication d'un dispositif a semiconducteur |
Country Status (7)
Country | Link |
---|---|
US (1) | US4001465A (fr) |
JP (1) | JPS5423799B2 (fr) |
CA (1) | CA1036050A (fr) |
DE (1) | DE2409910C3 (fr) |
FR (1) | FR2262864B1 (fr) |
GB (1) | GB1449559A (fr) |
IT (1) | IT1033295B (fr) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1437112A (en) * | 1973-09-07 | 1976-05-26 | Mullard Ltd | Semiconductor device manufacture |
JPS5246784A (en) * | 1975-10-11 | 1977-04-13 | Hitachi Ltd | Process for production of semiconductor device |
US4142004A (en) | 1976-01-22 | 1979-02-27 | Bell Telephone Laboratories, Incorporated | Method of coating semiconductor substrates |
JPS6035818B2 (ja) * | 1976-09-22 | 1985-08-16 | 日本電気株式会社 | 半導体装置の製造方法 |
US4109050A (en) * | 1976-12-09 | 1978-08-22 | General Electric Company | Coated silicon-based ceramic composites and method for making same |
US4239811A (en) | 1979-08-16 | 1980-12-16 | International Business Machines Corporation | Low pressure chemical vapor deposition of silicon dioxide with oxygen enhancement of the chlorosilane-nitrous oxide reaction |
US4462846A (en) * | 1979-10-10 | 1984-07-31 | Varshney Ramesh C | Semiconductor structure for recessed isolation oxide |
US4272308A (en) * | 1979-10-10 | 1981-06-09 | Varshney Ramesh C | Method of forming recessed isolation oxide layers |
US4278705A (en) * | 1979-11-08 | 1981-07-14 | Bell Telephone Laboratories, Incorporated | Sequentially annealed oxidation of silicon to fill trenches with silicon dioxide |
US4331708A (en) * | 1980-11-04 | 1982-05-25 | Texas Instruments Incorporated | Method of fabricating narrow deep grooves in silicon |
JPS5873163A (ja) * | 1981-10-27 | 1983-05-02 | Toshiba Corp | Mos型半導体装置 |
CA1252372A (fr) * | 1985-01-21 | 1989-04-11 | Joseph P. Ellul | Dielectriques a base de nitsinitrure et de nitsinitrure oxyde sur silicium |
US4789560A (en) * | 1986-01-08 | 1988-12-06 | Advanced Micro Devices, Inc. | Diffusion stop method for forming silicon oxide during the fabrication of IC devices |
US6015737A (en) * | 1991-07-26 | 2000-01-18 | Denso Corporation | Production method of a vertical type MOSFET |
US6482716B1 (en) | 2000-01-11 | 2002-11-19 | Infineon Technologies North America Corp. | Uniform recess depth of recessed resist layers in trench structure |
GB0223361D0 (en) * | 2002-10-08 | 2002-11-13 | Council Cent Lab Res Councils | Optical micro sensor |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL169121C (nl) * | 1970-07-10 | 1982-06-01 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting met een halfgeleiderlichaam, dat aan een oppervlak is voorzien van een althans ten dele in het halfgeleiderlichaam verzonken, door thermische oxydatie gevormd oxydepatroon. |
US3719535A (en) * | 1970-12-21 | 1973-03-06 | Motorola Inc | Hyperfine geometry devices and method for their fabrication |
NL7204741A (fr) * | 1972-04-08 | 1973-10-10 | ||
US3899372A (en) * | 1973-10-31 | 1975-08-12 | Ibm | Process for controlling insulating film thickness across a semiconductor wafer |
-
1974
- 1974-03-01 DE DE2409910A patent/DE2409910C3/de not_active Expired
- 1974-12-09 GB GB5306374A patent/GB1449559A/en not_active Expired
- 1974-12-30 CA CA217,052A patent/CA1036050A/fr not_active Expired
-
1975
- 1975-02-28 IT IT20772/75A patent/IT1033295B/it active
- 1975-02-28 FR FR7506302A patent/FR2262864B1/fr not_active Expired
- 1975-02-28 US US05/554,164 patent/US4001465A/en not_active Expired - Lifetime
- 1975-02-28 JP JP2552175A patent/JPS5423799B2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
IT1033295B (it) | 1979-07-10 |
FR2262864A1 (fr) | 1975-09-26 |
GB1449559A (en) | 1976-09-15 |
US4001465A (en) | 1977-01-04 |
USB554164I5 (fr) | 1976-03-09 |
FR2262864B1 (fr) | 1979-03-16 |
DE2409910A1 (de) | 1975-09-18 |
DE2409910B2 (de) | 1978-07-20 |
JPS5423799B2 (fr) | 1979-08-16 |
DE2409910C3 (de) | 1979-03-15 |
JPS50122184A (fr) | 1975-09-25 |
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