BRPI0920720A2 - dispositivo e método de deslocamento cíclico, dispositivo de decodificação de ldpc, receptor de televisão, e, sistema de recepção. - Google Patents

dispositivo e método de deslocamento cíclico, dispositivo de decodificação de ldpc, receptor de televisão, e, sistema de recepção.

Info

Publication number
BRPI0920720A2
BRPI0920720A2 BRPI0920720A BRPI0920720A BRPI0920720A2 BR PI0920720 A2 BRPI0920720 A2 BR PI0920720A2 BR PI0920720 A BRPI0920720 A BR PI0920720A BR PI0920720 A BRPI0920720 A BR PI0920720A BR PI0920720 A2 BRPI0920720 A2 BR PI0920720A2
Authority
BR
Brazil
Prior art keywords
television receiver
receiving system
ldpc decoding
cyclic displacement
decoding device
Prior art date
Application number
BRPI0920720A
Other languages
English (en)
Inventor
Takashi Yokokawa
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of BRPI0920720A2 publication Critical patent/BRPI0920720A2/pt

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/762—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data having at least two separately controlled rearrangement levels, e.g. multistage interconnection networks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1168—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices wherein the sub-matrices have column and row weights greater than one, e.g. multi-diagonal sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H03M13/6519—Support of multiple transmission or communication standards
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/01—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
    • G06F5/015—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising having at least two separately controlled shifting levels, e.g. using shifting matrices

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Multimedia (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Error Detection And Correction (AREA)
BRPI0920720A 2008-10-08 2009-10-08 dispositivo e método de deslocamento cíclico, dispositivo de decodificação de ldpc, receptor de televisão, e, sistema de recepção. BRPI0920720A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2008261504A JP5320964B2 (ja) 2008-10-08 2008-10-08 サイクリックシフト装置、サイクリックシフト方法、ｌｄｐｃ復号装置、テレビジョン受像機、及び、受信システム
PCT/JP2009/067529 WO2010041700A1 (ja) 2008-10-08 2009-10-08 サイクリックシフト装置、サイクリックシフト方法、ldpc復号装置、テレビジョン受像機、及び、受信システム

Publications (1)

Publication Number Publication Date
BRPI0920720A2 true BRPI0920720A2 (pt) 2015-12-29

Family

ID=42100648

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0920720A BRPI0920720A2 (pt) 2008-10-08 2009-10-08 dispositivo e método de deslocamento cíclico, dispositivo de decodificação de ldpc, receptor de televisão, e, sistema de recepção.

Country Status (8)

Country Link
US (1) US8612835B2 (pt)
EP (1) EP2333961B1 (pt)
JP (1) JP5320964B2 (pt)
CN (1) CN102171936B (pt)
BR (1) BRPI0920720A2 (pt)
RU (1) RU2480905C2 (pt)
TW (1) TWI433470B (pt)
WO (1) WO2010041700A1 (pt)

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US20140325303A1 (en) * 2013-04-30 2014-10-30 Lsi Corporation Systems and Methods for Protected Data Encoding
KR102240220B1 (ko) * 2013-05-02 2021-04-13 소니 주식회사 데이터 처리 장치 및 데이터 처리 방법
WO2014178299A1 (ja) * 2013-05-02 2014-11-06 ソニー株式会社 データ処理装置、及びデータ処理方法
BR112015027135B1 (pt) * 2013-05-02 2022-02-15 Sony Corporation Dispositivo e método de processamento de dados
KR101476051B1 (ko) * 2013-09-06 2014-12-23 세종대학교산학협력단 Ldpc 엔코더 및 그의 동작 방법
CN105531937A (zh) * 2013-09-20 2016-04-27 索尼公司 数据处理装置和数据处理方法
WO2015072145A1 (ja) * 2013-11-15 2015-05-21 日本放送協会 符号化器、復号器、送信装置及び受信装置
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KR20150137430A (ko) * 2014-05-29 2015-12-09 삼성전자주식회사 통신 시스템에서 비-이진 ｌｄｐｃ 부호를 복호화하는 방법 및 장치
US9413390B1 (en) * 2014-07-16 2016-08-09 Xilinx, Inc. High throughput low-density parity-check (LDPC) decoder via rescheduling
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RU2613533C1 (ru) * 2016-02-08 2017-03-16 Федеральное государственное автономное образовательное учреждение высшего профессионального образования "Национальный исследовательский ядерный университет "МИФИ" (НИЯУ МИФИ) Устройство сдвига
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JP6885025B2 (ja) * 2016-11-18 2021-06-09 ソニーグループ株式会社 送信装置、及び、送信方法
RU2667772C1 (ru) * 2017-05-05 2018-09-24 Хуавэй Текнолоджиз Ко., Лтд. Способ и устройство обработки информации и устройство связи
CN109217878B (zh) * 2017-06-30 2021-09-14 重庆软维科技有限公司 一种数据处理装置及方法
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Also Published As

Publication number Publication date
WO2010041700A1 (ja) 2010-04-15
TW201015873A (en) 2010-04-16
JP5320964B2 (ja) 2013-10-23
RU2480905C2 (ru) 2013-04-27
JP2010093541A (ja) 2010-04-22
EP2333961A4 (en) 2013-03-06
EP2333961B1 (en) 2015-09-16
RU2011112695A (ru) 2012-10-10
TWI433470B (zh) 2014-04-01
US8612835B2 (en) 2013-12-17
CN102171936A (zh) 2011-08-31
US20110191650A1 (en) 2011-08-04
CN102171936B (zh) 2014-02-26
EP2333961A1 (en) 2011-06-15

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]
B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: EM VIRTUDE DO ARQUIVAMENTO PUBLICADO NA RPI 2483 DE 07-08-2018 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDO O ARQUIVAMENTO DO PEDIDO DE PATENTE, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.