BR112022006422A2 - Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas - Google Patents

Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas

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Publication number
BR112022006422A2
BR112022006422A2 BR112022006422A BR112022006422A BR112022006422A2 BR 112022006422 A2 BR112022006422 A2 BR 112022006422A2 BR 112022006422 A BR112022006422 A BR 112022006422A BR 112022006422 A BR112022006422 A BR 112022006422A BR 112022006422 A2 BR112022006422 A2 BR 112022006422A2
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BR
Brazil
Prior art keywords
layer
reference layer
flag
value
prevention
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Application number
BR112022006422A
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English (en)
Inventor
Wang Ye-Kui
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Huawei Tech Co Ltd
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Publication of BR112022006422A2 publication Critical patent/BR112022006422A2/pt

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)

Abstract

PREVENÇÃO DE SINALIZAÇÃO REDUNDANTE EM FLUXOS DE BITS DE VÍDEO DE MÚLTIPLAS CAMADAS. Um método de decodificação inclui receber um fluxo de bits tendo uma pluralidade de camadas e um conjunto de parâmetros de vídeo (VPS), em que o VPS inclui uma flag de camada de referência direta, em que a flag de camada de referência direta igual a um primeiro valor especifica que uma segunda camada não é uma camada de referência direta para uma primeira camada, e em que a flag de camada de referência direta igual a um segundo valor especifica que a segunda camada é a camada de referência direta para a primeira camada; derivar uma flag de camada de referência ao: definir inicialmente a flag de camada de referência como o primeiro valor; e atualizar a flag de camada de referência como o segundo valor quando a flag de camada de referência direta tiver o segundo valor; e decodificar uma imagem a partir da primeira camada de acordo com a flag de camada de referência para obter uma imagem decodificada.
BR112022006422A 2019-10-07 2020-10-06 Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas BR112022006422A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201962911808P 2019-10-07 2019-10-07
PCT/US2020/054451 WO2021022270A2 (en) 2019-10-07 2020-10-06 Avoidance of redundant signaling in multi-layer video bitstreams

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BR112022006422A2 true BR112022006422A2 (pt) 2022-06-28

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BR122022009663-8A BR122022009663A2 (pt) 2019-10-07 2020-10-06 Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas
BR112022006389A BR112022006389A2 (pt) 2019-10-07 2020-10-06 Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas
BR122022009683-2A BR122022009683A2 (pt) 2019-10-07 2020-10-06 Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas
BR122022009696-4A BR122022009696A2 (pt) 2019-10-07 2020-10-06 Prevenção de erro em extração de subfluxo de bits
BR122022009671-9A BR122022009671A2 (pt) 2019-10-07 2020-10-06 Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas
BR112022006419A BR112022006419A2 (pt) 2019-10-07 2020-10-06 Prevenção de erro de sps em extração de subfluxo de bits
BR112022006392A BR112022006392A2 (pt) 2019-10-07 2020-10-06 Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas
BR112022006422A BR112022006422A2 (pt) 2019-10-07 2020-10-06 Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas
BR112022006393A BR112022006393A2 (pt) 2019-10-07 2020-10-06 Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas
BR112022006421A BR112022006421A2 (pt) 2019-10-07 2020-10-06 Prevenção de erro em extração de subfluxo de bits
BR122022009673-5A BR122022009673A2 (pt) 2019-10-07 2020-10-06 Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas
BR112022006429A BR112022006429A2 (pt) 2019-10-07 2020-10-06 Restrições de entrada de imagem de referência com base em tamanho de dpb

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BR122022009663-8A BR122022009663A2 (pt) 2019-10-07 2020-10-06 Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas
BR112022006389A BR112022006389A2 (pt) 2019-10-07 2020-10-06 Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas
BR122022009683-2A BR122022009683A2 (pt) 2019-10-07 2020-10-06 Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas
BR122022009696-4A BR122022009696A2 (pt) 2019-10-07 2020-10-06 Prevenção de erro em extração de subfluxo de bits
BR122022009671-9A BR122022009671A2 (pt) 2019-10-07 2020-10-06 Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas
BR112022006419A BR112022006419A2 (pt) 2019-10-07 2020-10-06 Prevenção de erro de sps em extração de subfluxo de bits
BR112022006392A BR112022006392A2 (pt) 2019-10-07 2020-10-06 Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas

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BR112022006393A BR112022006393A2 (pt) 2019-10-07 2020-10-06 Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas
BR112022006421A BR112022006421A2 (pt) 2019-10-07 2020-10-06 Prevenção de erro em extração de subfluxo de bits
BR122022009673-5A BR122022009673A2 (pt) 2019-10-07 2020-10-06 Prevenção de sinalização redundante em fluxos de bits de vídeo de múltiplas camadas
BR112022006429A BR112022006429A2 (pt) 2019-10-07 2020-10-06 Restrições de entrada de imagem de referência com base em tamanho de dpb

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US (7) US20220239934A1 (pt)
EP (7) EP4026335A4 (pt)
JP (14) JP7451691B2 (pt)
KR (7) KR20220071275A (pt)
CN (15) CN117651135A (pt)
AU (7) AU2020319904A1 (pt)
BR (12) BR122022009663A2 (pt)
CA (4) CA3156988A1 (pt)
CL (4) CL2022000859A1 (pt)
IL (1) IL292060A (pt)
MX (4) MX2022004141A (pt)
WO (7) WO2021022271A2 (pt)

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