BR112018006092A2 - técnicas para identificar um corner de processo - Google Patents

técnicas para identificar um corner de processo

Info

Publication number
BR112018006092A2
BR112018006092A2 BR112018006092-5A BR112018006092A BR112018006092A2 BR 112018006092 A2 BR112018006092 A2 BR 112018006092A2 BR 112018006092 A BR112018006092 A BR 112018006092A BR 112018006092 A2 BR112018006092 A2 BR 112018006092A2
Authority
BR
Brazil
Prior art keywords
rim2
rim1
output frequency
process corner
identifying
Prior art date
Application number
BR112018006092-5A
Other languages
English (en)
Portuguese (pt)
Inventor
Pu Yu
Samson Giby
Hoy Leong Yuen Kendrick
Original Assignee
Qualcomm Incorporated
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Incorporated filed Critical Qualcomm Incorporated
Publication of BR112018006092A2 publication Critical patent/BR112018006092A2/pt

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3004—Current or voltage test
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
    • H10P74/207—Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/27—Structural arrangements therefor
    • H10P74/277—Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Automation & Control Theory (AREA)
  • Manufacturing & Machinery (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
BR112018006092-5A 2015-09-25 2016-08-26 técnicas para identificar um corner de processo BR112018006092A2 (pt)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201562232486P 2015-09-25 2015-09-25
US62/232,486 2015-09-25
US15/015,547 US10191106B2 (en) 2015-09-25 2016-02-04 Techniques to identify a process corner
US15/015,547 2016-02-04
PCT/US2016/049028 WO2017053006A1 (en) 2015-09-25 2016-08-26 Techniques to identify a process corner

Publications (1)

Publication Number Publication Date
BR112018006092A2 true BR112018006092A2 (pt) 2018-10-16

Family

ID=56990952

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112018006092-5A BR112018006092A2 (pt) 2015-09-25 2016-08-26 técnicas para identificar um corner de processo

Country Status (9)

Country Link
US (1) US10191106B2 (https=)
EP (1) EP3353561B1 (https=)
JP (1) JP2019500575A (https=)
KR (1) KR20180056761A (https=)
CN (1) CN108027402B (https=)
BR (1) BR112018006092A2 (https=)
CA (1) CA2997532A1 (https=)
TW (1) TW201721163A (https=)
WO (1) WO2017053006A1 (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10394982B2 (en) 2014-02-26 2019-08-27 International Business Machines Corporation Partial parameters and projection thereof included within statistical timing analysis
CN114639610B (zh) * 2020-12-15 2024-06-07 长鑫存储技术有限公司 工艺角检测电路与工艺角检测方法
CN114138726B (zh) * 2021-11-12 2025-09-09 国微集团(深圳)有限公司 一种针对存在相邻边均相互垂直的多边形的gdsii版图数据的处理方法
CN114414999A (zh) * 2022-02-28 2022-04-29 北京智芯微电子科技有限公司 一种芯片工艺角检测电路、方法和芯片
TWI829433B (zh) 2022-11-16 2024-01-11 創意電子股份有限公司 晶片特性量測方法、測試裝置以及非暫態電腦可讀取媒體

Family Cites Families (24)

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EP0653843A3 (en) * 1993-11-17 1996-05-01 Hewlett Packard Co CMOS circuits with adaptive voltage threshold.
US5486786A (en) 1994-08-09 1996-01-23 Lsi Logic Corporation Process monitor for CMOS integrated circuits
US5631596A (en) 1994-08-09 1997-05-20 Lsi Logic Corporation Process monitor for CMOS integrated circuits
US6850075B1 (en) * 2000-12-22 2005-02-01 Cypress Semiconductor Corp. SRAM self-timed write stress test mode
US7126365B2 (en) * 2002-04-16 2006-10-24 Transmeta Corporation System and method for measuring negative bias thermal instability with a ring oscillator
US6894528B2 (en) * 2002-09-17 2005-05-17 Sun Microsystems, Inc. Process monitor based keeper scheme for dynamic circuits
JP2006041951A (ja) * 2004-07-27 2006-02-09 Fujitsu Ltd プロセスばらつき検知装置およびプロセスばらつき検知方法
US7330080B1 (en) 2004-11-04 2008-02-12 Transmeta Corporation Ring based impedance control of an output driver
US7627839B1 (en) 2005-11-14 2009-12-01 National Semiconductor Corporation Process corner indicator and estimation circuit
US20090027131A1 (en) * 2007-07-25 2009-01-29 Shingo Suzuki Ring oscillators for cmos transistor beta ratio monitoring
JP5452983B2 (ja) * 2009-06-03 2014-03-26 株式会社メガチップス プロセスモニタ回路およびプロセス特性の判定方法
US8674774B2 (en) 2009-09-07 2014-03-18 Nec Corporation Aging diagnostic device, aging diagnostic method
JP5529555B2 (ja) 2010-01-20 2014-06-25 ルネサスエレクトロニクス株式会社 半導体集積回路、動作電圧制御方法
TWI422847B (zh) * 2010-09-01 2014-01-11 Univ Nat Chiao Tung 全晶片上寬工作電壓溫度製程電壓的感測系統
US8441310B2 (en) * 2010-12-07 2013-05-14 Broadcom Corporation Power control based on dual loop with multiple process detection circuits
JP5226094B2 (ja) * 2011-02-23 2013-07-03 株式会社半導体理工学研究センター 半導体記憶装置
US8954764B2 (en) 2012-03-05 2015-02-10 Csr Technology Inc. Method and apparatus for dynamic power management
US8801281B1 (en) 2012-05-24 2014-08-12 Pixelworks, Inc. On-chip temperature detection using an oscillator
KR20140023726A (ko) * 2012-08-17 2014-02-27 에스케이하이닉스 주식회사 반도체 장치, 반도체 시스템 및 그의 모니터링 방법
US9112484B1 (en) * 2012-12-20 2015-08-18 Mie Fujitsu Semiconductor Limited Integrated circuit process and bias monitors and related methods
US8976574B2 (en) * 2013-03-13 2015-03-10 Qualcomm Incorporated Process corner sensor for bit-cells
JP2017079336A (ja) * 2014-01-31 2017-04-27 国立大学法人東北大学 サイドチャネル攻撃の検知装置、サイドチャネル攻撃の検知装置によるサイドチャネル攻撃の検知方法
CN104101827B (zh) * 2014-06-25 2016-08-31 东南大学 一种基于自定时振荡环的工艺角检测电路
KR102298158B1 (ko) * 2014-08-25 2021-09-03 삼성전자주식회사 반도체 장치와 이를 포함하는 위상 동기 회로

Also Published As

Publication number Publication date
CN108027402B (zh) 2020-06-16
US10191106B2 (en) 2019-01-29
JP2019500575A (ja) 2019-01-10
KR20180056761A (ko) 2018-05-29
WO2017053006A1 (en) 2017-03-30
EP3353561B1 (en) 2019-09-18
CN108027402A (zh) 2018-05-11
US20170089974A1 (en) 2017-03-30
TW201721163A (zh) 2017-06-16
CA2997532A1 (en) 2017-03-30
EP3353561A1 (en) 2018-08-01

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Legal Events

Date Code Title Description
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 6A ANUIDADE.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: EM VIRTUDE DO ARQUIVAMENTO PUBLICADO NA RPI 2685 DE 21-06-2022 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDO O ARQUIVAMENTO DO PEDIDO DE PATENTE, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.