BR112016023531A2 - sistema e método para modificação de sequência de inicialização usando instruções restritas a chips que residem em um dispositivo de memória externa - Google Patents
sistema e método para modificação de sequência de inicialização usando instruções restritas a chips que residem em um dispositivo de memória externaInfo
- Publication number
- BR112016023531A2 BR112016023531A2 BR112016023531A BR112016023531A BR112016023531A2 BR 112016023531 A2 BR112016023531 A2 BR 112016023531A2 BR 112016023531 A BR112016023531 A BR 112016023531A BR 112016023531 A BR112016023531 A BR 112016023531A BR 112016023531 A2 BR112016023531 A2 BR 112016023531A2
- Authority
- BR
- Brazil
- Prior art keywords
- instructions
- mac
- restricted
- memory device
- external memory
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/57—Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
- G06F21/575—Secure boot
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
- H04L9/3236—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using cryptographic hash functions
- H04L9/3242—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using cryptographic hash functions involving keyed hash functions, e.g. message authentication codes [MACs], CBC-MAC or HMAC
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/2129—Authenticate client device independently of the user
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/2149—Restricted operating environment
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/80—Wireless
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Storage Device Security (AREA)
- Stored Programmes (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201461976491P | 2014-04-07 | 2014-04-07 | |
| US14/267,894 US20150286823A1 (en) | 2014-04-07 | 2014-05-01 | System and method for boot sequence modification using chip-restricted instructions residing on an external memory device |
| PCT/US2015/024407 WO2015157131A2 (en) | 2014-04-07 | 2015-04-05 | System and method for boot sequence modification using chip-restricted instructions residing on an external memory device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BR112016023531A2 true BR112016023531A2 (pt) | 2017-08-15 |
Family
ID=54210008
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BR112016023531A BR112016023531A2 (pt) | 2014-04-07 | 2015-04-05 | sistema e método para modificação de sequência de inicialização usando instruções restritas a chips que residem em um dispositivo de memória externa |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US20150286823A1 (enExample) |
| EP (1) | EP3134843A2 (enExample) |
| JP (1) | JP2017517795A (enExample) |
| KR (1) | KR20160142319A (enExample) |
| CN (1) | CN106164853A (enExample) |
| BR (1) | BR112016023531A2 (enExample) |
| WO (1) | WO2015157131A2 (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10846099B2 (en) * | 2016-10-07 | 2020-11-24 | Blackberry Limited | Selecting a boot loader on an electronic device |
| JP2018078485A (ja) * | 2016-11-10 | 2018-05-17 | キヤノン株式会社 | 情報処理装置および情報処理装置の起動方法 |
| CN108279935A (zh) * | 2016-12-30 | 2018-07-13 | 北京中科晶上科技股份有限公司 | 一种针对片上系统的操作系统启动引导方法 |
| US11409882B2 (en) * | 2019-12-02 | 2022-08-09 | International Business Machines Corporation | Secure embedded microcontroller image load |
| KR20220156329A (ko) | 2021-05-18 | 2022-11-25 | 삼성전자주식회사 | 전자 장치 및 전자 장치에 보안 부팅을 적용하는 방법 |
| US11570180B1 (en) * | 2021-12-23 | 2023-01-31 | Eque Corporation | Systems configured for validation with a dynamic cryptographic code and methods thereof |
| JP2023105421A (ja) * | 2022-01-19 | 2023-07-31 | キヤノン株式会社 | 情報処理装置および情報処理装置の制御方法 |
| CN116866097A (zh) * | 2022-03-26 | 2023-10-10 | 隆胜(深圳)科技有限公司 | 一种离线式智能家居自组网方法 |
| CN119376804B (zh) * | 2024-12-31 | 2025-04-11 | 中国星网网络应用研究院有限公司 | 芯片启动方法、装置、计算机可读存储介质、计算机程序产品、芯片以及计算设备 |
Family Cites Families (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030159047A1 (en) * | 2000-09-26 | 2003-08-21 | Telefonaktiebolaget L M Ericsson (Publ) | Method of securing and exposing a logotype in an electronic device |
| JP2002259152A (ja) * | 2000-12-26 | 2002-09-13 | Matsushita Electric Ind Co Ltd | フラッシュメモリ書換方法 |
| US6859876B2 (en) * | 2000-12-29 | 2005-02-22 | Hewlett-Packard Development Company, L.P. | System and method for detecting and using a replacement boot block during initialization by an original boot block |
| US7237121B2 (en) * | 2001-09-17 | 2007-06-26 | Texas Instruments Incorporated | Secure bootloader for securing digital devices |
| US6715085B2 (en) * | 2002-04-18 | 2004-03-30 | International Business Machines Corporation | Initializing, maintaining, updating and recovering secure operation within an integrated system employing a data access control function |
| US6907522B2 (en) * | 2002-06-07 | 2005-06-14 | Microsoft Corporation | Use of hashing in a secure boot loader |
| US7142891B2 (en) * | 2003-10-10 | 2006-11-28 | Texas Instruments Incorporated | Device bound flashing/booting for cloning prevention |
| US7500098B2 (en) * | 2004-03-19 | 2009-03-03 | Nokia Corporation | Secure mode controlled memory |
| US8239673B2 (en) * | 2004-04-08 | 2012-08-07 | Texas Instruments Incorporated | Methods, apparatus and systems with loadable kernel architecture for processors |
| US8112618B2 (en) * | 2004-04-08 | 2012-02-07 | Texas Instruments Incorporated | Less-secure processors, integrated circuits, wireless communications apparatus, methods and processes of making |
| US20060294312A1 (en) * | 2004-05-27 | 2006-12-28 | Silverbrook Research Pty Ltd | Generation sequences |
| US7523299B2 (en) * | 2005-07-29 | 2009-04-21 | Broadcom Corporation | Method and system for modifying operation of ROM based boot code of a network adapter chip |
| JP2009534910A (ja) * | 2006-04-19 | 2009-09-24 | 韓國電子通信研究院 | 移動通信システムの認証キー生成方法 |
| CN101082939A (zh) * | 2006-05-31 | 2007-12-05 | 中国科学院微电子研究所 | 一种片上系统设计中的复位电路设计方法 |
| US8572399B2 (en) * | 2006-10-06 | 2013-10-29 | Broadcom Corporation | Method and system for two-stage security code reprogramming |
| US8209550B2 (en) * | 2007-04-20 | 2012-06-26 | Telefonaktiebolaget Lm Ericsson (Publ) | Method and apparatus for protecting SIMLock information in an electronic device |
| KR101393307B1 (ko) * | 2007-07-13 | 2014-05-12 | 삼성전자주식회사 | 보안 부팅 방법 및 그 방법을 사용하는 반도체 메모리시스템 |
| US9613215B2 (en) * | 2008-04-10 | 2017-04-04 | Nvidia Corporation | Method and system for implementing a secure chain of trust |
| US20100106953A1 (en) * | 2008-10-23 | 2010-04-29 | Horizon Semiconductors Ltd. | Method for patching rom boot code |
| CN102265263A (zh) * | 2008-12-24 | 2011-11-30 | 松下电器产业株式会社 | 总线控制器及初始引导程序的修补方法 |
| CN101504692B (zh) * | 2009-03-25 | 2012-03-21 | 炬力集成电路设计有限公司 | 一种验证和测试片上系统的系统及方法 |
| KR101523420B1 (ko) * | 2010-04-12 | 2015-05-27 | 인터디지탈 패튼 홀딩스, 인크 | 부팅 처리에서의 단계화 제어 해제 |
| KR20120092222A (ko) * | 2011-02-11 | 2012-08-21 | 삼성전자주식회사 | 보안 부팅 방법 및 보안 부트 이미지 생성 방법 |
| JP2012185606A (ja) * | 2011-03-04 | 2012-09-27 | Denso Wave Inc | 携帯端末 |
| US8775784B2 (en) * | 2011-11-11 | 2014-07-08 | International Business Machines Corporation | Secure boot up of a computer based on a hardware based root of trust |
| US8386763B1 (en) * | 2012-01-04 | 2013-02-26 | Google Inc. | System and method for locking down a capability of a computer system |
| US20140164753A1 (en) * | 2012-12-06 | 2014-06-12 | Samsung Electronics Co., Ltd | System on chip for performing secure boot, image forming apparatus using the same, and method thereof |
| US9880856B2 (en) * | 2013-02-22 | 2018-01-30 | Marvell World Trade Ltd. | Patching boot code of read-only memory |
-
2014
- 2014-05-01 US US14/267,894 patent/US20150286823A1/en not_active Abandoned
-
2015
- 2015-04-05 JP JP2016560693A patent/JP2017517795A/ja active Pending
- 2015-04-05 BR BR112016023531A patent/BR112016023531A2/pt not_active IP Right Cessation
- 2015-04-05 EP EP15776312.9A patent/EP3134843A2/en not_active Withdrawn
- 2015-04-05 CN CN201580018273.1A patent/CN106164853A/zh active Pending
- 2015-04-05 WO PCT/US2015/024407 patent/WO2015157131A2/en not_active Ceased
- 2015-04-05 KR KR1020167029099A patent/KR20160142319A/ko not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| US20150286823A1 (en) | 2015-10-08 |
| KR20160142319A (ko) | 2016-12-12 |
| EP3134843A2 (en) | 2017-03-01 |
| CN106164853A (zh) | 2016-11-23 |
| WO2015157131A2 (en) | 2015-10-15 |
| WO2015157131A3 (en) | 2016-03-17 |
| JP2017517795A (ja) | 2017-06-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| B08F | Application fees: application dismissed [chapter 8.6 patent gazette] |
Free format text: REFERENTE A 5A ANUIDADE. |
|
| B08K | Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette] |
Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 2560 DE 28/01/2020. |
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| B350 | Update of information on the portal [chapter 15.35 patent gazette] |