BR112016001232A8 - Sistema robusto de recuperação de erro de hardware / sofware - Google Patents

Sistema robusto de recuperação de erro de hardware / sofware

Info

Publication number
BR112016001232A8
BR112016001232A8 BR112016001232A BR112016001232A BR112016001232A8 BR 112016001232 A8 BR112016001232 A8 BR 112016001232A8 BR 112016001232 A BR112016001232 A BR 112016001232A BR 112016001232 A BR112016001232 A BR 112016001232A BR 112016001232 A8 BR112016001232 A8 BR 112016001232A8
Authority
BR
Brazil
Prior art keywords
error
host controller
host
recovery system
software
Prior art date
Application number
BR112016001232A
Other languages
English (en)
Other versions
BR112016001232B1 (pt
BR112016001232A2 (pt
Inventor
Shacham Assaf
Haim Maya
Lanel Ital
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR112016001232A2 publication Critical patent/BR112016001232A2/pt
Publication of BR112016001232A8 publication Critical patent/BR112016001232A8/pt
Publication of BR112016001232B1 publication Critical patent/BR112016001232B1/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793—Remedial or corrective actions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0745—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in an input/output transactions management context
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3024—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/86—Event-based monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Retry When Errors Occur (AREA)
  • Debugging And Monitoring (AREA)
  • Hardware Redundancy (AREA)

Abstract

SISTEMA ROBUSTO DE RECUPERAÇÃO DE ERRO DE HARDWARE / SOFTWARE. A presente invenção se refere a um método para detecção e recuperação de erro, em que um controlador de acolhimento e um software de acolhimento colaboram em conjunto. O controlador de acolhimento pode: detectar uma condição de erro, definir uma interrupção ou registro de erro e / ou suspender a execução ou processamento de uma tarefa no controlador de acolhimento. O software de acolhimento pode: detectar uma condição de erro como resultado do controlador de acolhimento ter definido a interrupção ou registro de erro; realizar o tratamento do erro e apagar a condição de erro. O controlador de acolhimento então retoma a execução ou processamento de tarefas mediante a detecção de que a condição de erro foi apagada pelo software de acolhimento.
BR112016001232-1A 2013-07-23 2014-07-23 Método operacional em um controlador de hospedeiro, memória legível por computador e dispositivo hospedeiro BR112016001232B1 (pt)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361857571P 2013-07-23 2013-07-23
US61/857,571 2013-07-23
US14/338,279 2014-07-22
US14/338,279 US9442793B2 (en) 2013-07-23 2014-07-22 Robust hardware/software error recovery system
PCT/US2014/047908 WO2015013460A1 (en) 2013-07-23 2014-07-23 Robust hardware/software error recovery system

Publications (3)

Publication Number Publication Date
BR112016001232A2 BR112016001232A2 (pt) 2017-09-05
BR112016001232A8 true BR112016001232A8 (pt) 2022-08-16
BR112016001232B1 BR112016001232B1 (pt) 2022-10-25

Family

ID=52391538

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112016001232-1A BR112016001232B1 (pt) 2013-07-23 2014-07-23 Método operacional em um controlador de hospedeiro, memória legível por computador e dispositivo hospedeiro

Country Status (18)

Country Link
US (1) US9442793B2 (pt)
EP (2) EP3985512B1 (pt)
JP (1) JP6162336B2 (pt)
KR (1) KR101770949B1 (pt)
CN (1) CN105408868B (pt)
AR (1) AR097140A1 (pt)
AU (1) AU2014293070A1 (pt)
BR (1) BR112016001232B1 (pt)
CA (1) CA2917578A1 (pt)
CL (1) CL2016000185A1 (pt)
HK (1) HK1219325A1 (pt)
MX (1) MX349374B (pt)
MY (1) MY182582A (pt)
PH (1) PH12016500030B1 (pt)
SA (1) SA516370444B1 (pt)
SG (1) SG11201510140PA (pt)
TW (1) TWI591478B (pt)
WO (1) WO2015013460A1 (pt)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9442793B2 (en) * 2013-07-23 2016-09-13 Qualcomm Incorporated Robust hardware/software error recovery system
US10007586B2 (en) 2016-01-08 2018-06-26 Microsoft Technology Licensing, Llc Deferred server recovery in computing systems
US10606678B2 (en) 2017-11-17 2020-03-31 Tesla, Inc. System and method for handling errors in a vehicle neural network processor
US10860412B2 (en) * 2017-12-08 2020-12-08 Apple Inc. Coordinated panic flow
US11307921B2 (en) 2017-12-08 2022-04-19 Apple Inc. Coordinated panic flow
KR102429433B1 (ko) * 2018-01-18 2022-08-04 삼성전자주식회사 영상 표시 장치 및 그 구동 방법
CN109669802A (zh) * 2018-11-13 2019-04-23 北京时代民芯科技有限公司 一种用于edac验证的可配置存储器验证系统
CN115934389A (zh) * 2021-08-04 2023-04-07 三星电子株式会社 用于错误报告和处理的系统和方法
TWI789075B (zh) * 2021-10-26 2023-01-01 中華電信股份有限公司 偵測應用程式的異常執行的電子裝置及方法

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US5513346A (en) * 1993-10-21 1996-04-30 Intel Corporation Error condition detector for handling interrupt in integrated circuits having multiple processors
US6223299B1 (en) 1998-05-04 2001-04-24 International Business Machines Corporation Enhanced error handling for I/O load/store operations to a PCI device via bad parity or zero byte enables
US6546482B1 (en) 1999-05-07 2003-04-08 Advanced Micro Devices, Inc. Invalid configuration detection resource
US6615374B1 (en) * 1999-08-30 2003-09-02 Intel Corporation First and next error identification for integrated circuit devices
US6594785B1 (en) 2000-04-28 2003-07-15 Unisys Corporation System and method for fault handling and recovery in a multi-processing system having hardware resources shared between multiple partitions
US6802039B1 (en) * 2000-06-30 2004-10-05 Intel Corporation Using hardware or firmware for cache tag and data ECC soft error correction
US6966042B2 (en) * 2003-03-13 2005-11-15 International Business Machine Corporation System for detecting and reporting defects in a chip
US7493513B2 (en) 2003-04-29 2009-02-17 International Business Machines Corporation Automatically freezing functionality of a computing entity responsive to an error
US20060277444A1 (en) * 2005-06-03 2006-12-07 Nicholas Holian Recordation of error information
CN101901177B (zh) * 2010-01-22 2012-11-21 威盛电子股份有限公司 多核微处理器及其除错方法
US8782461B2 (en) * 2010-09-24 2014-07-15 Intel Corporation Method and system of live error recovery
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US9442793B2 (en) * 2013-07-23 2016-09-13 Qualcomm Incorporated Robust hardware/software error recovery system

Also Published As

Publication number Publication date
US9442793B2 (en) 2016-09-13
CN105408868B (zh) 2018-10-30
JP2016532192A (ja) 2016-10-13
MX2016000818A (es) 2016-05-24
MY182582A (en) 2021-01-25
SG11201510140PA (en) 2016-02-26
CA2917578A1 (en) 2015-01-29
EP3985512B1 (en) 2024-01-10
HK1219325A1 (zh) 2017-03-31
CL2016000185A1 (es) 2016-07-29
SA516370444B1 (ar) 2018-08-08
KR101770949B1 (ko) 2017-08-24
PH12016500030A1 (en) 2016-04-04
EP3025233A1 (en) 2016-06-01
JP6162336B2 (ja) 2017-07-12
US20150033071A1 (en) 2015-01-29
BR112016001232B1 (pt) 2022-10-25
MX349374B (es) 2017-07-25
TWI591478B (zh) 2017-07-11
TW201516652A (zh) 2015-05-01
BR112016001232A2 (pt) 2017-09-05
KR20160034939A (ko) 2016-03-30
AR097140A1 (es) 2016-02-24
CN105408868A (zh) 2016-03-16
EP3025233B1 (en) 2022-03-09
PH12016500030B1 (en) 2016-04-04
EP3985512C0 (en) 2024-01-10
EP3985512A1 (en) 2022-04-20
WO2015013460A1 (en) 2015-01-29
AU2014293070A1 (en) 2016-03-03

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Legal Events

Date Code Title Description
B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B350 Update of information on the portal [chapter 15.35 patent gazette]
B06A Patent application procedure suspended [chapter 6.1 patent gazette]
B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

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