BR112015032790A2 - sistema e método para fornecimento de controle de acesso a uma unidade de processamento gráfica - Google Patents

sistema e método para fornecimento de controle de acesso a uma unidade de processamento gráfica

Info

Publication number
BR112015032790A2
BR112015032790A2 BR112015032790A BR112015032790A BR112015032790A2 BR 112015032790 A2 BR112015032790 A2 BR 112015032790A2 BR 112015032790 A BR112015032790 A BR 112015032790A BR 112015032790 A BR112015032790 A BR 112015032790A BR 112015032790 A2 BR112015032790 A2 BR 112015032790A2
Authority
BR
Brazil
Prior art keywords
gpu
processing unit
access control
graphics processing
command processor
Prior art date
Application number
BR112015032790A
Other languages
English (en)
Portuguese (pt)
Inventor
Touzni Azzedine
Zeng Thomas
Torzewski William
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR112015032790A2 publication Critical patent/BR112015032790A2/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/74—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/2113—Multi-level security, e.g. mandatory access control

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Storage Device Security (AREA)
  • Image Generation (AREA)
BR112015032790A 2013-07-01 2014-06-30 sistema e método para fornecimento de controle de acesso a uma unidade de processamento gráfica BR112015032790A2 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201361841881P 2013-07-01 2013-07-01
US14/014,032 US9507961B2 (en) 2013-07-01 2013-08-29 System and method for providing secure access control to a graphics processing unit
PCT/US2014/044776 WO2015002851A1 (en) 2013-07-01 2014-06-30 System and method for providing secure access control to a graphics processing unit

Publications (1)

Publication Number Publication Date
BR112015032790A2 true BR112015032790A2 (pt) 2017-07-25

Family

ID=52115146

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112015032790A BR112015032790A2 (pt) 2013-07-01 2014-06-30 sistema e método para fornecimento de controle de acesso a uma unidade de processamento gráfica

Country Status (8)

Country Link
US (1) US9507961B2 (enExample)
EP (1) EP3017396B1 (enExample)
JP (1) JP2016524257A (enExample)
KR (1) KR20160025554A (enExample)
CN (1) CN105393258B (enExample)
BR (1) BR112015032790A2 (enExample)
CA (1) CA2912929A1 (enExample)
WO (1) WO2015002851A1 (enExample)

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EP2900819B1 (en) 2012-09-28 2020-10-28 Cepheid Methods for dna and rna extraction from fixed paraffin-embedded tissue samples
FR3026207B1 (fr) * 2014-09-22 2018-08-17 Prove & Run Terminal a affichage securise
US11055806B2 (en) * 2015-02-27 2021-07-06 Advanced Micro Devices, Inc. Method and apparatus for directing application requests for rendering
US10102391B2 (en) * 2015-08-07 2018-10-16 Qualcomm Incorporated Hardware enforced content protection for graphics processing units
US9767320B2 (en) 2015-08-07 2017-09-19 Qualcomm Incorporated Hardware enforced content protection for graphics processing units
US10127627B2 (en) * 2015-09-23 2018-11-13 Intel Corporation Mapping graphics resources to linear arrays using a paging system
WO2017062541A1 (en) * 2015-10-06 2017-04-13 Carnegie Mellon University Method and apparatus for trusted display on untrusted computing platforms to secure applications
US10471543B2 (en) * 2015-12-15 2019-11-12 Lawrence Livermore National Security, Llc Laser-assisted additive manufacturing
US10089272B2 (en) * 2016-02-22 2018-10-02 Dell Products, Lp Data-category switch module in the control plane for use with internet of things devices
US10628611B2 (en) 2016-11-04 2020-04-21 Qualcomm Incorporated Exclusive execution environment within a system-on-a-chip computing system
US10848483B2 (en) * 2016-12-08 2020-11-24 Ricoh Company, Ltd. Shared terminal, communication system, and display control method, and recording medium
US10387679B2 (en) * 2017-01-06 2019-08-20 Capitalogix Ip Owner, Llc Secure intelligent networked architecture with dynamic feedback
EP3355188B1 (en) 2017-01-31 2021-08-25 OpenSynergy GmbH Instrument display on a car dashboard by checking frames of a gui by a realtime os
JP6721125B2 (ja) * 2017-07-12 2020-07-08 日本電気株式会社 権限判定システム、セキュアデバイス、判定装置、権限管理方法及び権限判定プログラム
US11295008B2 (en) * 2019-02-13 2022-04-05 Nec Corporation Graphics processing unit accelerated trusted execution environment
DE112020003881T8 (de) 2019-08-16 2022-06-09 Fiduciaedge Technologies Co., Ltd. System und verfahren zur durchführung von trusted computing mit fernbescheinigung und informationsisolierung auf heterogenen prozessoren über eine offene verbindung

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US7007025B1 (en) 2001-06-08 2006-02-28 Xsides Corporation Method and system for maintaining secure data input and output
US7203310B2 (en) * 2001-12-04 2007-04-10 Microsoft Corporation Methods and systems for cryptographically protecting secure content
US7673304B2 (en) 2003-02-18 2010-03-02 Microsoft Corporation Multithreaded kernel for graphics processing unit
US7421694B2 (en) 2003-02-18 2008-09-02 Microsoft Corporation Systems and methods for enhancing performance of a coprocessor
US7444523B2 (en) 2004-08-27 2008-10-28 Microsoft Corporation System and method for using address bits to signal security attributes of data in the address space
US8954751B2 (en) * 2004-10-08 2015-02-10 International Business Machines Corporation Secure memory control parameters in table look aside buffer data fields and support memory array
JP3965408B2 (ja) * 2004-12-28 2007-08-29 イーストラテジー株式会社 デジタルコンテンツデータ提供システム
TWI322354B (en) * 2005-10-18 2010-03-21 Via Tech Inc Method and system for deferred command issuing in a computer system
US8766995B2 (en) * 2006-04-26 2014-07-01 Qualcomm Incorporated Graphics system with configurable caches
US20100031342A1 (en) * 2007-04-12 2010-02-04 Honeywell International, Inc Method and system for providing secure video data transmission and processing
US8269780B2 (en) * 2007-06-07 2012-09-18 Apple Inc. Batching graphics operations with time stamp tracking
US8393008B2 (en) * 2008-05-21 2013-03-05 Microsoft Corporation Hardware-based output protection of multiple video streams
US9405931B2 (en) * 2008-11-14 2016-08-02 Dell Products L.P. Protected information stream allocation using a virtualized platform
WO2011075484A2 (en) * 2009-12-14 2011-06-23 Citrix Systems, Inc. A secure virtualization environment bootable from an external media device
JP5699755B2 (ja) * 2011-03-31 2015-04-15 富士通株式会社 割当方法、割当装置、および割当プログラム
US8562441B1 (en) 2011-05-03 2013-10-22 Zynga Inc. Secure, parallel, and independent script execution
US8943330B2 (en) * 2011-05-10 2015-01-27 Qualcomm Incorporated Apparatus and method for hardware-based secure data processing using buffer memory address range rules
US9727385B2 (en) * 2011-07-18 2017-08-08 Apple Inc. Graphical processing unit (GPU) implementing a plurality of virtual GPUs
GB2501470B (en) * 2012-04-17 2020-09-16 Advanced Risc Mach Ltd Management of data processing security in a secondary processor
GB2501274B (en) * 2012-04-17 2020-05-13 Advanced Risc Mach Ltd Management of data processing security in a secondary processor
US8931108B2 (en) * 2013-02-18 2015-01-06 Qualcomm Incorporated Hardware enforced content protection for graphics processing units

Also Published As

Publication number Publication date
EP3017396A1 (en) 2016-05-11
CN105393258A (zh) 2016-03-09
WO2015002851A1 (en) 2015-01-08
CN105393258B (zh) 2018-05-25
US9507961B2 (en) 2016-11-29
KR20160025554A (ko) 2016-03-08
US20150002523A1 (en) 2015-01-01
EP3017396B1 (en) 2017-10-11
JP2016524257A (ja) 2016-08-12
CA2912929A1 (en) 2015-01-08

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Legal Events

Date Code Title Description
B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B11B Dismissal acc. art. 36, par 1 of ipl - no reply within 90 days to fullfil the necessary requirements
B350 Update of information on the portal [chapter 15.35 patent gazette]