BR112015032790A2 - sistema e método para fornecimento de controle de acesso a uma unidade de processamento gráfica - Google Patents

sistema e método para fornecimento de controle de acesso a uma unidade de processamento gráfica

Info

Publication number
BR112015032790A2
BR112015032790A2 BR112015032790A BR112015032790A BR112015032790A2 BR 112015032790 A2 BR112015032790 A2 BR 112015032790A2 BR 112015032790 A BR112015032790 A BR 112015032790A BR 112015032790 A BR112015032790 A BR 112015032790A BR 112015032790 A2 BR112015032790 A2 BR 112015032790A2
Authority
BR
Brazil
Prior art keywords
gpu
processing unit
access control
graphics processing
command processor
Prior art date
Application number
BR112015032790A
Other languages
English (en)
Inventor
Touzni Azzedine
Zeng Thomas
Torzewski William
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR112015032790A2 publication Critical patent/BR112015032790A2/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/74—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/2113—Multi-level security, e.g. mandatory access control

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Storage Device Security (AREA)
  • Image Generation (AREA)

Abstract

1/1 resumo "sistema e método para fornecimento de controle de acesso seguro a uma unidade de processamento gráfica" sistemas, métodos e programas de computador são descritos para fornecer o controle de acesso seguro para uma unidade de processamento gráfico (gpu). um sistema inclui uma gpu, uma pluralidade de interfaces de programação de gpu, e um processador de comando. cada interface de programação de gpu é dinamicamente designada para uma zona diferente dentre a pluralidade de zonas de segurança. cada interface de programação de gpu é configurada para receber pedidos de trabalho emitidos por um ou mais aplicativos associados com a zona de segurança correspondente. os pedidos de trabalho compreendem instruções a serem executadas pela gpu. o processador de comando está em comunicação com a pluralidade de interfaces de programação de gpu. o processador de comando é configurado para controlar a execução dos pedidos de trabalho recebidos pela pluralidade de interfaces de programação de gpu utilizando regiões de memória segura separadas. cada região de memória segura é alocada a uma dentre a pluralidade de zonas de segurança.
BR112015032790A 2013-07-01 2014-06-30 sistema e método para fornecimento de controle de acesso a uma unidade de processamento gráfica BR112015032790A2 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201361841881P 2013-07-01 2013-07-01
US14/014,032 US9507961B2 (en) 2013-07-01 2013-08-29 System and method for providing secure access control to a graphics processing unit
PCT/US2014/044776 WO2015002851A1 (en) 2013-07-01 2014-06-30 System and method for providing secure access control to a graphics processing unit

Publications (1)

Publication Number Publication Date
BR112015032790A2 true BR112015032790A2 (pt) 2017-07-25

Family

ID=52115146

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112015032790A BR112015032790A2 (pt) 2013-07-01 2014-06-30 sistema e método para fornecimento de controle de acesso a uma unidade de processamento gráfica

Country Status (8)

Country Link
US (1) US9507961B2 (pt)
EP (1) EP3017396B1 (pt)
JP (1) JP2016524257A (pt)
KR (1) KR20160025554A (pt)
CN (1) CN105393258B (pt)
BR (1) BR112015032790A2 (pt)
CA (1) CA2912929A1 (pt)
WO (1) WO2015002851A1 (pt)

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US10127627B2 (en) * 2015-09-23 2018-11-13 Intel Corporation Mapping graphics resources to linear arrays using a paging system
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US10848483B2 (en) * 2016-12-08 2020-11-24 Ricoh Company, Ltd. Shared terminal, communication system, and display control method, and recording medium
US10387679B2 (en) 2017-01-06 2019-08-20 Capitalogix Ip Owner, Llc Secure intelligent networked architecture with dynamic feedback
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US20200293695A1 (en) * 2017-07-12 2020-09-17 Nec Corporation Right determination system, secure device, determination device, right management method, and right determination program
US11295008B2 (en) * 2019-02-13 2022-04-05 Nec Corporation Graphics processing unit accelerated trusted execution environment
DE112020003881T8 (de) * 2019-08-16 2022-06-09 Fiduciaedge Technologies Co., Ltd. System und verfahren zur durchführung von trusted computing mit fernbescheinigung und informationsisolierung auf heterogenen prozessoren über eine offene verbindung

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US7444523B2 (en) 2004-08-27 2008-10-28 Microsoft Corporation System and method for using address bits to signal security attributes of data in the address space
US8954751B2 (en) * 2004-10-08 2015-02-10 International Business Machines Corporation Secure memory control parameters in table look aside buffer data fields and support memory array
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Also Published As

Publication number Publication date
CN105393258B (zh) 2018-05-25
EP3017396B1 (en) 2017-10-11
CA2912929A1 (en) 2015-01-08
KR20160025554A (ko) 2016-03-08
EP3017396A1 (en) 2016-05-11
WO2015002851A1 (en) 2015-01-08
US9507961B2 (en) 2016-11-29
US20150002523A1 (en) 2015-01-01
JP2016524257A (ja) 2016-08-12
CN105393258A (zh) 2016-03-09

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Legal Events

Date Code Title Description
B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B11B Dismissal acc. art. 36, par 1 of ipl - no reply within 90 days to fullfil the necessary requirements
B350 Update of information on the portal [chapter 15.35 patent gazette]