BR112013033196A8 - processo de gestão da resistência de memórias não voláteis - Google Patents
processo de gestão da resistência de memórias não voláteisInfo
- Publication number
- BR112013033196A8 BR112013033196A8 BR112013033196A BR112013033196A BR112013033196A8 BR 112013033196 A8 BR112013033196 A8 BR 112013033196A8 BR 112013033196 A BR112013033196 A BR 112013033196A BR 112013033196 A BR112013033196 A BR 112013033196A BR 112013033196 A8 BR112013033196 A8 BR 112013033196A8
- Authority
- BR
- Brazil
- Prior art keywords
- management process
- nonvolatile memories
- resistance management
- resistance
- nonvolatile
- Prior art date
Links
- 230000015654 memory Effects 0.000 title 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
- G06F2212/1036—Life time enhancement
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7204—Capacity control, e.g. partitioning, end-of-life degradation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7209—Validity control, e.g. using flags, time stamps or sequence numbers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7211—Wear leveling
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR1101929A FR2977047B1 (fr) | 2011-06-22 | 2011-06-22 | Procede de gestion de l'endurance de memoires non volatiles. |
| FR11/01929 | 2011-06-22 | ||
| PCT/FR2012/000251 WO2012175827A1 (fr) | 2011-06-22 | 2012-06-22 | Procédé de gestion de l'endurance de mémoires non volatiles |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| BR112013033196A2 BR112013033196A2 (pt) | 2017-03-01 |
| BR112013033196A8 true BR112013033196A8 (pt) | 2018-07-10 |
| BR112013033196B1 BR112013033196B1 (pt) | 2021-04-27 |
Family
ID=46579142
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BR112013033196-8A BR112013033196B1 (pt) | 2011-06-22 | 2012-06-22 | Processo de gestão da durabilidade de um sistema de armazenagem de dados e dispositivo para aplicação do processo |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US9286207B2 (pt) |
| EP (1) | EP2724237B1 (pt) |
| CN (1) | CN103842974B (pt) |
| BR (1) | BR112013033196B1 (pt) |
| FR (1) | FR2977047B1 (pt) |
| RU (1) | RU2600525C2 (pt) |
| WO (1) | WO2012175827A1 (pt) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6403162B2 (ja) * | 2015-07-23 | 2018-10-10 | 東芝メモリ株式会社 | メモリシステム |
| CN107025066A (zh) * | 2016-09-14 | 2017-08-08 | 阿里巴巴集团控股有限公司 | 在基于闪存的存储介质中写入存储数据的方法和装置 |
| CN109448774B (zh) * | 2018-10-15 | 2021-03-19 | 上海华虹宏力半导体制造有限公司 | 快闪存储器干扰存储区位置的判定方法 |
| FR3125897A1 (fr) | 2021-07-30 | 2023-02-03 | Idemia Identity & Security France | Procédé pour optimiser un fonctionnement d’un élément sécurisé |
| FR3138536A1 (fr) * | 2022-07-28 | 2024-02-02 | Idemia Identity & Security France | Procédé de gestion d’une mémoire d’un élément sécurisé |
| CN115509465B (zh) * | 2022-11-21 | 2023-03-28 | 杭州字节方舟科技有限公司 | 一种扇区管理方法、装置、电子设备及存储介质 |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5835413A (en) * | 1996-12-20 | 1998-11-10 | Intel Corporation | Method for improved data retention in a nonvolatile writeable memory by sensing and reprogramming cell voltage levels |
| JP4085478B2 (ja) * | 1998-07-28 | 2008-05-14 | ソニー株式会社 | 記憶媒体及び電子機器システム |
| IT1302433B1 (it) * | 1998-08-13 | 2000-09-05 | Texas Instruments Italia Spa | Circuito di lettura per dispositivi di memoria flash con perfezionatimargini di programmazione e procedimento di funzionamento |
| JP2002074999A (ja) * | 2000-08-23 | 2002-03-15 | Sharp Corp | 不揮発性半導体記憶装置 |
| JP4129381B2 (ja) * | 2002-09-25 | 2008-08-06 | 株式会社ルネサステクノロジ | 不揮発性半導体記憶装置 |
| US7106636B2 (en) * | 2004-06-22 | 2006-09-12 | Intel Corporation | Partitionable memory device, system, and method |
| US20060282610A1 (en) * | 2005-06-08 | 2006-12-14 | M-Systems Flash Disk Pioneers Ltd. | Flash memory with programmable endurance |
| US20070174549A1 (en) * | 2006-01-24 | 2007-07-26 | Yevgen Gyl | Method for utilizing a memory interface to control partitioning of a memory module |
| US20070208904A1 (en) * | 2006-03-03 | 2007-09-06 | Wu-Han Hsieh | Wear leveling method and apparatus for nonvolatile memory |
| JP5016027B2 (ja) * | 2006-05-15 | 2012-09-05 | サンディスク コーポレイション | 最終期を計算する不揮発性メモリシステム |
| US8060718B2 (en) * | 2006-06-20 | 2011-11-15 | International Business Machines | Updating a memory to maintain even wear |
| US7804718B2 (en) * | 2007-03-07 | 2010-09-28 | Mosaid Technologies Incorporated | Partial block erase architecture for flash memory |
| CN101409108B (zh) * | 2007-10-09 | 2011-04-13 | 群联电子股份有限公司 | 平均磨损方法及使用此方法的控制器 |
| CN100592427C (zh) * | 2007-12-05 | 2010-02-24 | 苏州壹世通科技有限公司 | 一种数据块的磨损处理方法和装置 |
| US8244959B2 (en) * | 2008-11-10 | 2012-08-14 | Atmel Rousset S.A.S. | Software adapted wear leveling |
| US20100199020A1 (en) * | 2009-02-04 | 2010-08-05 | Silicon Storage Technology, Inc. | Non-volatile memory subsystem and a memory controller therefor |
| US20120117303A1 (en) * | 2010-11-04 | 2012-05-10 | Numonyx B.V. | Metadata storage associated with flash translation layer |
-
2011
- 2011-06-22 FR FR1101929A patent/FR2977047B1/fr active Active
-
2012
- 2012-06-22 WO PCT/FR2012/000251 patent/WO2012175827A1/fr active Application Filing
- 2012-06-22 CN CN201280040808.1A patent/CN103842974B/zh active Active
- 2012-06-22 BR BR112013033196-8A patent/BR112013033196B1/pt active IP Right Grant
- 2012-06-22 RU RU2014101458/08A patent/RU2600525C2/ru active
- 2012-06-22 EP EP12738481.6A patent/EP2724237B1/fr active Active
- 2012-06-22 US US14/127,914 patent/US9286207B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN103842974B (zh) | 2016-06-29 |
| RU2600525C2 (ru) | 2016-10-20 |
| EP2724237A1 (fr) | 2014-04-30 |
| FR2977047B1 (fr) | 2013-08-16 |
| WO2012175827A1 (fr) | 2012-12-27 |
| RU2014101458A (ru) | 2015-07-27 |
| EP2724237B1 (fr) | 2018-03-28 |
| BR112013033196A2 (pt) | 2017-03-01 |
| US9286207B2 (en) | 2016-03-15 |
| US20140223082A1 (en) | 2014-08-07 |
| BR112013033196B1 (pt) | 2021-04-27 |
| CN103842974A (zh) | 2014-06-04 |
| FR2977047A1 (fr) | 2012-12-28 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| B06F | Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette] | ||
| B06U | Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette] | ||
| B06A | Patent application procedure suspended [chapter 6.1 patent gazette] | ||
| B09A | Decision: intention to grant [chapter 9.1 patent gazette] | ||
| B16A | Patent or certificate of addition of invention granted [chapter 16.1 patent gazette] |
Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 22/06/2012, OBSERVADAS AS CONDICOES LEGAIS. |
|
| B25D | Requested change of name of applicant approved |
Owner name: IDEMIA STARCHIP (FR) |