BR112012024958A2 - encaminhamento de palavra crítica com previsão adaptativa - Google Patents
encaminhamento de palavra crítica com previsão adaptativaInfo
- Publication number
- BR112012024958A2 BR112012024958A2 BR112012024958A BR112012024958A BR112012024958A2 BR 112012024958 A2 BR112012024958 A2 BR 112012024958A2 BR 112012024958 A BR112012024958 A BR 112012024958A BR 112012024958 A BR112012024958 A BR 112012024958A BR 112012024958 A2 BR112012024958 A2 BR 112012024958A2
- Authority
- BR
- Brazil
- Prior art keywords
- data
- memory controller
- delays
- early response
- adaptive prediction
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
encaminhamento de palavra crítica com previsão adaptativa. a presente invenção refere-se a uma modalidade, um sistema que inclui um controlador de memória, processadores e caches correspondentes. o sistema pode incluir fontes de incerteza que impedem a organização precisa do encaminhamento de dados para uma operação de carga que não falta no cache do processador. o controlador de memória pode prover uma resposta antecipada que indica que os dados devem ser providos em um ciclo de clock subsequente. uma unidade de interface entre o controlador de memória e os caches/processadores pode prever um atraso a partir de uma resposta antecipada aos dados correspondentes recentemente recebidos, e que pode preparar especulativamente para remeter os dados supondo que eles estarão disponíveis como previsto. a unidade de interface pode monitorar os atrasos entre a resposta antecipada e a remessa dos dados, ou pelo menos a porção do atraso que pode variar. com base nos atrasos mensurados, a unidade pode modificar os atrasos previstos subsequentes.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/791,387 US8713277B2 (en) | 2010-06-01 | 2010-06-01 | Critical word forwarding with adaptive prediction |
| PCT/US2011/038171 WO2011153072A1 (en) | 2010-06-01 | 2011-05-26 | Critical word forwarding with adaptive prediction |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BR112012024958A2 true BR112012024958A2 (pt) | 2016-07-12 |
Family
ID=44504142
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BR112012024958A BR112012024958A2 (pt) | 2010-06-01 | 2011-05-26 | encaminhamento de palavra crítica com previsão adaptativa |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US8713277B2 (pt) |
| EP (1) | EP2539824A1 (pt) |
| JP (1) | JP5621041B2 (pt) |
| KR (1) | KR101417558B1 (pt) |
| CN (1) | CN102822810B (pt) |
| AU (1) | AU2011261655B2 (pt) |
| BR (1) | BR112012024958A2 (pt) |
| MX (1) | MX2012011336A (pt) |
| TW (1) | TWI451252B (pt) |
| WO (1) | WO2011153072A1 (pt) |
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| GB2497525A (en) | 2011-12-12 | 2013-06-19 | St Microelectronics Ltd | Controlling shared memory data flow |
| EP2801032B1 (en) * | 2012-01-04 | 2020-01-01 | Intel Corporation | Bimodal functionality between coherent link and memory expansion |
| US8982644B1 (en) * | 2012-02-24 | 2015-03-17 | Marvell Israel (M.I.S.L.) Ltd. | Method and apparatus for memory control |
| US8612650B1 (en) * | 2012-03-13 | 2013-12-17 | Western Digital Technologies, Inc. | Virtual extension of buffer to reduce buffer overflow during tracing |
| US9146758B2 (en) * | 2012-06-29 | 2015-09-29 | Vmware, Inc. | Simultaneous probing of multiple software modules of a computer system |
| US8996853B2 (en) | 2012-06-29 | 2015-03-31 | Vmware, Inc. | Probing the boot sequence of a computer system |
| US10089126B2 (en) | 2013-03-21 | 2018-10-02 | Vmware, Inc. | Function exit instrumentation for tail-call optimized code |
| US9678816B2 (en) | 2012-06-29 | 2017-06-13 | Vmware, Inc. | System and method for injecting faults into code for testing thereof |
| KR102025251B1 (ko) * | 2012-10-31 | 2019-09-25 | 삼성전자주식회사 | 메모리 시스템 및 그것의 프로그램 방법 |
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| US9625971B2 (en) * | 2014-01-10 | 2017-04-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | System and method of adaptive voltage frequency scaling |
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| CN106716383B (zh) * | 2014-09-15 | 2021-01-22 | 爱德斯托科技有限公司 | 存储器装置和控制存储器装置的方法、存储器系统 |
| US9541949B2 (en) * | 2014-09-22 | 2017-01-10 | Intel Corporation | Synchronization of domain counters |
| US9740646B2 (en) | 2014-12-20 | 2017-08-22 | Intel Corporation | Early identification in transactional buffered memory |
| US9658963B2 (en) * | 2014-12-23 | 2017-05-23 | Intel Corporation | Speculative reads in buffered memory |
| US10048893B2 (en) * | 2015-05-07 | 2018-08-14 | Apple Inc. | Clock/power-domain crossing circuit with asynchronous FIFO and independent transmitter and receiver sides |
| KR20170094815A (ko) | 2016-02-11 | 2017-08-22 | 삼성전자주식회사 | 비휘발성 메모리, 그것을 포함하는 컴퓨팅 시스템, 및 그것의 읽기 방법 |
| GB2548845B (en) | 2016-03-29 | 2019-11-27 | Imagination Tech Ltd | Handling memory requests |
| US10055351B1 (en) | 2016-06-29 | 2018-08-21 | EMC IP Holding Company LLC | Low-overhead index for a flash cache |
| US10146438B1 (en) | 2016-06-29 | 2018-12-04 | EMC IP Holding Company LLC | Additive library for data structures in a flash memory |
| US10331561B1 (en) | 2016-06-29 | 2019-06-25 | Emc Corporation | Systems and methods for rebuilding a cache index |
| US10089025B1 (en) | 2016-06-29 | 2018-10-02 | EMC IP Holding Company LLC | Bloom filters in a flash memory |
| US10261704B1 (en) | 2016-06-29 | 2019-04-16 | EMC IP Holding Company LLC | Linked lists in flash memory |
| US10037164B1 (en) | 2016-06-29 | 2018-07-31 | EMC IP Holding Company LLC | Flash interface for processing datasets |
| US11196587B2 (en) | 2016-11-23 | 2021-12-07 | DeGirum Corporation | Permutated ring network |
| US10164758B2 (en) | 2016-11-30 | 2018-12-25 | Taiwan Semicondcutor Manufacturing Co., Ltd. | Read-write data translation technique of asynchronous clock domains |
| US10380034B2 (en) * | 2017-07-14 | 2019-08-13 | International Business Machines Corporation | Cache return order optimization |
| US10476656B2 (en) * | 2018-04-13 | 2019-11-12 | DeGirum Corporation | System and method for asynchronous, multiple clock domain data streams coalescing and resynchronization |
| US10691632B1 (en) | 2019-03-14 | 2020-06-23 | DeGirum Corporation | Permutated ring network interconnected computing architecture |
| US11757612B2 (en) | 2021-10-29 | 2023-09-12 | Hewlett Packard Enterprise Development Lp | Communicating management traffic between baseboard management controllers and network interface controllers |
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| JPS63308656A (ja) * | 1987-06-10 | 1988-12-16 | Fujitsu Ltd | ブロックアクセス制御装置 |
| GB2226666B (en) * | 1988-12-30 | 1993-07-07 | Intel Corp | Request/response protocol |
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-
2010
- 2010-06-01 US US12/791,387 patent/US8713277B2/en active Active
-
2011
- 2011-05-26 EP EP11743162A patent/EP2539824A1/en not_active Withdrawn
- 2011-05-26 JP JP2013512246A patent/JP5621041B2/ja not_active Expired - Fee Related
- 2011-05-26 KR KR1020127025317A patent/KR101417558B1/ko not_active Expired - Fee Related
- 2011-05-26 AU AU2011261655A patent/AU2011261655B2/en not_active Ceased
- 2011-05-26 BR BR112012024958A patent/BR112012024958A2/pt not_active IP Right Cessation
- 2011-05-26 MX MX2012011336A patent/MX2012011336A/es active IP Right Grant
- 2011-05-26 CN CN201180016505.1A patent/CN102822810B/zh not_active Expired - Fee Related
- 2011-05-26 WO PCT/US2011/038171 patent/WO2011153072A1/en not_active Ceased
- 2011-06-01 TW TW100119291A patent/TWI451252B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| AU2011261655A1 (en) | 2012-10-11 |
| TWI451252B (zh) | 2014-09-01 |
| CN102822810A (zh) | 2012-12-12 |
| JP2013532325A (ja) | 2013-08-15 |
| MX2012011336A (es) | 2012-11-30 |
| US8713277B2 (en) | 2014-04-29 |
| JP5621041B2 (ja) | 2014-11-05 |
| WO2011153072A1 (en) | 2011-12-08 |
| KR20120131196A (ko) | 2012-12-04 |
| EP2539824A1 (en) | 2013-01-02 |
| CN102822810B (zh) | 2015-09-16 |
| KR101417558B1 (ko) | 2014-07-08 |
| US20110296110A1 (en) | 2011-12-01 |
| TW201211766A (en) | 2012-03-16 |
| AU2011261655B2 (en) | 2013-12-19 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| B08F | Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette] | ||
| B08K | Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette] |