BR112015018304A2 - mecanismo de escrita de memória não volátil - Google Patents

mecanismo de escrita de memória não volátil

Info

Publication number
BR112015018304A2
BR112015018304A2 BR112015018304A BR112015018304A BR112015018304A2 BR 112015018304 A2 BR112015018304 A2 BR 112015018304A2 BR 112015018304 A BR112015018304 A BR 112015018304A BR 112015018304 A BR112015018304 A BR 112015018304A BR 112015018304 A2 BR112015018304 A2 BR 112015018304A2
Authority
BR
Brazil
Prior art keywords
valid
nonvolatile memory
variables
obsolete
regions
Prior art date
Application number
BR112015018304A
Other languages
English (en)
Inventor
Terry Lee Pingchung
Yu Xinlai
Original Assignee
Hewlett Packard Development Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Development Co filed Critical Hewlett Packard Development Co
Publication of BR112015018304A2 publication Critical patent/BR112015018304A2/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0891—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using clearing, invalidating or resetting means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614—Improving the reliability of storage systems
    • G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/60—Software deployment
    • G06F8/65—Updates
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/20—Employing a main memory using a specific memory technology
    • G06F2212/202—Non-volatile memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7205—Cleaning, compaction, garbage collection, erase control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Human Computer Interaction (AREA)
  • Computer Security & Cryptography (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Debugging And Monitoring (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

resumo mecanismo de escrita de memória não volátil um sistema inclui um buffer de memória para armazenar em cache uma memória não volátil. a memória não volátil armazena uma pluralidade de variáveis válidas e obsoletas em uma pluralidade de regiões válidas e obsoletas, respectivamente. o sistema inclui ainda uma região de periódico para rastrear movimento de variáveis válidas e regiões válidas dentro do buffer de memória utilizando pares alternados de ponteiros de estrutura para indicar, pelo menos, porções da pluralidade de regiões válidas e obsoletas indicativas de onde e para onde as variáveis válidas movem durante um evento de escrita.
BR112015018304A 2013-01-30 2013-01-30 mecanismo de escrita de memória não volátil BR112015018304A2 (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2013/071104 WO2014117328A1 (en) 2013-01-30 2013-01-30 Non-volatile memory write mechanism

Publications (1)

Publication Number Publication Date
BR112015018304A2 true BR112015018304A2 (pt) 2017-07-18

Family

ID=51261390

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112015018304A BR112015018304A2 (pt) 2013-01-30 2013-01-30 mecanismo de escrita de memória não volátil

Country Status (8)

Country Link
US (1) US9665496B2 (pt)
EP (1) EP2951700A4 (pt)
JP (1) JP6013626B2 (pt)
KR (1) KR20150111937A (pt)
CN (1) CN104937562B (pt)
BR (1) BR112015018304A2 (pt)
TW (1) TWI506429B (pt)
WO (1) WO2014117328A1 (pt)

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EP2951700A4 (en) 2013-01-30 2016-08-31 Hewlett Packard Entpr Dev Lp NONVOLATILE MEMORY WRITING MECHANISM
JP5889933B2 (ja) * 2014-02-15 2016-03-22 レノボ・シンガポール・プライベート・リミテッド コンピュータの動作不良を防止する方法、コンピュータ・プログラムおよびコンピュータ
US10282538B2 (en) * 2014-12-27 2019-05-07 Intel Corporation Technologies for providing hardware subscription models using pre-boot update mechanism
US10949342B2 (en) 2015-01-09 2021-03-16 Hewlett Packard Enterprise Development Lp Persistent memory garbage collection
US10482008B2 (en) 2015-01-23 2019-11-19 Hewlett Packard Enterprise Development Lp Aligned variable reclamation
US10185553B2 (en) * 2016-06-30 2019-01-22 Microsoft Technology Licensing, Llc Fault-tolerant variable region repaving during firmware over the air update
US10140117B2 (en) 2016-06-30 2018-11-27 Microsoft Technology Licensing, Llc Fault-tolerant variable region repaving during firmware over the air update
WO2020026228A1 (en) * 2018-08-01 2020-02-06 Vdoo Connected Trust Ltd. Firmware verification
KR20210023184A (ko) * 2019-08-22 2021-03-04 에스케이하이닉스 주식회사 런타임 오버레이를 통해 펌웨어를 관리하는 장치 및 방법
US11599087B2 (en) * 2020-10-21 2023-03-07 Dell Products L.P. System and method of utilizing information handling system identity types with motherboards of information handling systems
WO2023136830A1 (en) * 2022-01-14 2023-07-20 Hewlett-Packard Development Company, L.P. Variable memories

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Also Published As

Publication number Publication date
EP2951700A4 (en) 2016-08-31
EP2951700A1 (en) 2015-12-09
CN104937562B (zh) 2018-04-06
JP6013626B2 (ja) 2016-10-25
CN104937562A (zh) 2015-09-23
KR20150111937A (ko) 2015-10-06
TWI506429B (zh) 2015-11-01
US9665496B2 (en) 2017-05-30
TW201447575A (zh) 2014-12-16
US20150363323A1 (en) 2015-12-17
JP2016505180A (ja) 2016-02-18
WO2014117328A1 (en) 2014-08-07

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Legal Events

Date Code Title Description
B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 7A ANUIDADE.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: EM VIRTUDE DO ARQUIVAMENTO PUBLICADO NA RPI 2551 DE 26-11-2019 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDO O ARQUIVAMENTO DO PEDIDO DE PATENTE, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.