BR112012021102A2 - aparelho de processamento de dados, método para operar um aparelho de processamento de dados. - Google Patents

aparelho de processamento de dados, método para operar um aparelho de processamento de dados.

Info

Publication number
BR112012021102A2
BR112012021102A2 BR112012021102A BR112012021102A BR112012021102A2 BR 112012021102 A2 BR112012021102 A2 BR 112012021102A2 BR 112012021102 A BR112012021102 A BR 112012021102A BR 112012021102 A BR112012021102 A BR 112012021102A BR 112012021102 A2 BR112012021102 A2 BR 112012021102A2
Authority
BR
Brazil
Prior art keywords
processing circuit
circuit system
processing
workload
processing apparatus
Prior art date
Application number
BR112012021102A
Other languages
English (en)
Other versions
BR112012021102B1 (pt
Inventor
Richard Greenhalgh Peter
Roy Grisenthwaite Richard
Original Assignee
Advanced Risc Mach Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Risc Mach Ltd filed Critical Advanced Risc Mach Ltd
Publication of BR112012021102A2 publication Critical patent/BR112012021102A2/pt
Publication of BR112012021102B1 publication Critical patent/BR112012021102B1/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5083—Techniques for rebalancing the load in a distributed system
    • G06F9/5088—Techniques for rebalancing the load in a distributed system involving task migration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3293—Power saving characterised by the action undertaken by switching to a less power-consuming processor, e.g. sub-CPU
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5094—Allocation of resources, e.g. of the central processing unit [CPU] where the allocation takes into account power or heat criteria
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Sources (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

aparelho de processamento de dados, método para operar um aparelho de processamento de dados. são providos um aparelho de processamento de dados e um método para comutação do desempenho de uma carga de trabalho entre dois circuitos de processamento. o aparelho de processamento de dados tem o primeiro sistema de circuitos de processamento que é arquiteturalmente compatível com segundo sistema de circuitos de processamento, mas com o primeiro sistema de circuitos de processamento sendo microarquiteturalmente diferente do segundo sistema de circuitos de processamento. em qualquer momento, uma carga de trabalho que consiste em pelo menos uma aplicação e pelo menos um sistema operacional para executar esta aplicação é realizada por um do primeiro sistema de circuitos de processamento e do segundo sistema de circuitos de processamento. um controlador de comutação é responsivo a um estímulo de transferência para realizar uma operação de trasferência de passagem para transferir o desempenho da carga de trabalho do sistema de circuitos de processamento de origem para o sistema de circuitos de processamento de destino, com o sistema de circuitos de processamento de origem sendo um do primeiro e do segundo sistemas de circuitos de processamento e o sistema de circuitos de processamento de destino sendo o outro do primeiro e do segundo sistemas de circuitos de processamento. durante a operação de transferência de passagem, o controlador de comutação faz com que o sistema de circuitos de processamento de origem torne seu estado de arquitetura atual disponível ao sistema de circuitos de processamento de destino, o estado de arquitetura atual sendo aquele estado não disponível a partir da memória compartilhada no momento em que a operação de transferência for iniciada e que é necessário para que o sistema de circuitos de processamento de destino assuma o controle do desempenho da carga de trabalho do sistema de circuitos de processamento de origem com sucesso. além do mais, ocontrolador de comutação mascara a informação de configuração específica do processador predetrminada do pelo menos um sistema operacional, de modo que a transferência da carga de trabalho seja transparente a este sistema operacional. verificou-se que uma abordagem como esta produz significativos benefícios ao consumo de energia, ainda evitando complexidades associadas com a provisão de sistemas operacionais com a capacidade de comutação de aplicações entre circuitos de processamento.
BR112012021102-1A 2010-03-01 2011-02-17 Aparelho de processamento de dados, metodo para operar um aparelho de processamento de dados BR112012021102B1 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/659,234 US8418187B2 (en) 2010-03-01 2010-03-01 Virtualization software migrating workload between processing circuitries while making architectural states available transparent to operating system
US12/659234 2010-03-01
PCT/GB2011/050317 WO2011107776A1 (en) 2010-03-01 2011-02-17 A data processing apparatus and method for switching a workload between first and second processing circuitry

Publications (2)

Publication Number Publication Date
BR112012021102A2 true BR112012021102A2 (pt) 2017-07-11
BR112012021102B1 BR112012021102B1 (pt) 2020-11-24

Family

ID=44202159

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112012021102-1A BR112012021102B1 (pt) 2010-03-01 2011-02-17 Aparelho de processamento de dados, metodo para operar um aparelho de processamento de dados

Country Status (10)

Country Link
US (1) US8418187B2 (pt)
JP (1) JP5823987B2 (pt)
KR (1) KR101802140B1 (pt)
CN (1) CN102782671B (pt)
BR (1) BR112012021102B1 (pt)
DE (1) DE112011100744T5 (pt)
GB (1) GB2490823B (pt)
IL (1) IL221270A (pt)
RU (1) RU2520411C2 (pt)
WO (1) WO2011107776A1 (pt)

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Also Published As

Publication number Publication date
RU2012141606A (ru) 2014-04-10
BR112012021102B1 (pt) 2020-11-24
IL221270A0 (en) 2012-10-31
WO2011107776A1 (en) 2011-09-09
CN102782671A (zh) 2012-11-14
GB2490823B (en) 2017-04-12
US8418187B2 (en) 2013-04-09
GB2490823A (en) 2012-11-14
KR101802140B1 (ko) 2017-12-28
JP5823987B2 (ja) 2015-11-25
DE112011100744T5 (de) 2013-06-27
US20110213934A1 (en) 2011-09-01
GB201214368D0 (en) 2012-09-26
CN102782671B (zh) 2015-04-22
JP2013521557A (ja) 2013-06-10
KR20130044211A (ko) 2013-05-02
IL221270A (en) 2016-07-31
RU2520411C2 (ru) 2014-06-27

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Legal Events

Date Code Title Description
B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 17/02/2011, OBSERVADAS AS CONDICOES LEGAIS.