BR0010010A - Processo de fabrica de cartões sem contato por laminagem e cartão sem contato fabricado mediante tal processo - Google Patents

Processo de fabrica de cartões sem contato por laminagem e cartão sem contato fabricado mediante tal processo

Info

Publication number
BR0010010A
BR0010010A BR0010010-2A BR0010010A BR0010010A BR 0010010 A BR0010010 A BR 0010010A BR 0010010 A BR0010010 A BR 0010010A BR 0010010 A BR0010010 A BR 0010010A
Authority
BR
Brazil
Prior art keywords
sheet
contact
antenna
incorporation
manufacturing process
Prior art date
Application number
BR0010010-2A
Other languages
English (en)
Other versions
BRPI0010010B1 (pt
Inventor
Yann Limelette
Hayatel Yamani
Pierre Volpe
Original Assignee
Schlumberger Syst Mes
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Schlumberger Syst Mes filed Critical Schlumberger Syst Mes
Publication of BR0010010A publication Critical patent/BR0010010A/pt
Publication of BRPI0010010B1 publication Critical patent/BRPI0010010B1/pt

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/0772Physical layout of the record carrier
    • G06K19/07722Physical layout of the record carrier the record carrier being multilayered, e.g. laminated sheets
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745Mounting details of integrated circuit chips
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05571Disposition the external layer being disposed in a recess of the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05573Single external layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)
  • Extrusion Moulding Of Plastics Or The Like (AREA)
  • Laminated Bodies (AREA)
  • Manufacturing Optical Record Carriers (AREA)

Abstract

"PROCESSO DE FABRICA DE CARTõES SEM CONTATO POR LAMINAGEM E CARTãO SEM CONTATO FABRICADO MEDIANTE TAL PROCESSO". A invenção concerne um processo de fabrico de um objeto portátil tipo cartão comportando : - um corpo de objeto compreendendo uma folha suporte (12) plástica, uma folha de incorporação (18) plástica, assim como uma primeira (19) e segunda (20) folhas externas de revestimento; - uma antena (11) munida de dois bornes (13) de antena; e - um chip (14) de circuito integrado incorporado na folha de incorporação (18), e ligado eletricamente à antena. O processo de invenção caracteriza-se no que diz respeito ao conteúdo das etapas seguintes, pelas quais : - a folha suporte (12), para a qual transferimos o chip (14), é laminada com a folha de incorporação (18), de maneira a obter um primeiro conjunto laminado; e, numa etapa anterior : - o primeiro conjunto laminado é revestido com a primeira (19) e segunda (20) folhas externas de revestimento. A invenção aplica-se em particular ao fabrico de cartões sem contato por laminagem a quente.
BRPI0010010A 1999-04-29 2000-04-28 processo de fabrico de cartões sem contato por laminagem e cartão sem contato fabricado mediante tal processo BRPI0010010B1 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9905479A FR2793054B1 (fr) 1999-04-29 1999-04-29 Procede de fabrication de cartes sans contact par laminage et carte sans contact fabriquee selon un tel procede
PCT/FR2000/001136 WO2000067199A1 (fr) 1999-04-29 2000-04-28 Procede de fabrication de cartes sans contact par laminage et carte sans contact fabriquee selon un tel procede

Publications (2)

Publication Number Publication Date
BR0010010A true BR0010010A (pt) 2002-04-09
BRPI0010010B1 BRPI0010010B1 (pt) 2016-09-06

Family

ID=9545055

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0010010A BRPI0010010B1 (pt) 1999-04-29 2000-04-28 processo de fabrico de cartões sem contato por laminagem e cartão sem contato fabricado mediante tal processo

Country Status (10)

Country Link
US (1) US6745945B1 (pt)
EP (1) EP1185955B1 (pt)
JP (1) JP2002543537A (pt)
CN (1) CN1204529C (pt)
AT (1) ATE250785T1 (pt)
BR (1) BRPI0010010B1 (pt)
DE (1) DE60005511T2 (pt)
ES (1) ES2208314T3 (pt)
FR (1) FR2793054B1 (pt)
WO (1) WO2000067199A1 (pt)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1582515A (zh) 2001-12-10 2005-02-16 弗拉克托斯股份有限公司 无触点识别装置
CN1723587A (zh) * 2002-11-07 2006-01-18 碎云股份有限公司 含微型天线的集成电路封装
JP3739752B2 (ja) * 2003-02-07 2006-01-25 株式会社 ハリーズ ランダム周期変速可能な小片移載装置
CN100447969C (zh) * 2003-12-26 2008-12-31 神钢电机株式会社 Ic芯片安装体的制造方法以及制造装置
JP2005258350A (ja) * 2004-03-15 2005-09-22 Iwata Label Co Ltd 分割ラベル
US7573390B2 (en) * 2004-03-15 2009-08-11 Iwata Label Co., Ltd. Split-able label
JP4512389B2 (ja) * 2004-03-15 2010-07-28 株式会社岩田レーベル 薬液容器用分割ラベル
GB0405844D0 (en) * 2004-03-16 2004-04-21 Advanced Micropackaging Techno "Microelectronic and optoelectronic device packaging"
WO2006008180A1 (en) 2004-07-23 2006-01-26 Fractus S.A. Antenna in package with reduced electromagnetic interaction with on chip elements
WO2006059732A1 (ja) * 2004-12-03 2006-06-08 Hallys Corporation インターポーザ接合装置
CN101073297A (zh) * 2004-12-03 2007-11-14 哈里斯股份有限公司 电子部件的制造方法及电子部件的制造装置
WO2006109678A1 (ja) 2005-04-06 2006-10-19 Hallys Corporation 電子部品の製造装置
WO2006112447A1 (ja) * 2005-04-18 2006-10-26 Hallys Corporation 電子部品及び、この電子部品の製造方法
WO2007147629A1 (en) * 2006-06-23 2007-12-27 Fractus, S.A. Chip module, sim card, wireless device and wireless communication method
DE102008035522A1 (de) 2008-07-30 2010-02-04 Mühlbauer Ag Verfahren zur Herstellung einer Vorrichtung zur drahtlosen Kommunikation bzw. eines Prelaminats für eine solche Vorrichtung

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE167319T1 (de) * 1994-11-03 1998-06-15 Fela Holding Ag Basis folie für chip karte
JP2814477B2 (ja) * 1995-04-13 1998-10-22 ソニーケミカル株式会社 非接触式icカード及びその製造方法
FR2756955B1 (fr) * 1996-12-11 1999-01-08 Schlumberger Ind Sa Procede de realisation d'un circuit electronique pour une carte a memoire sans contact

Also Published As

Publication number Publication date
DE60005511T2 (de) 2004-06-17
BRPI0010010B1 (pt) 2016-09-06
US6745945B1 (en) 2004-06-08
EP1185955A1 (fr) 2002-03-13
ATE250785T1 (de) 2003-10-15
WO2000067199A1 (fr) 2000-11-09
CN1348570A (zh) 2002-05-08
EP1185955B1 (fr) 2003-09-24
JP2002543537A (ja) 2002-12-17
CN1204529C (zh) 2005-06-01
FR2793054A1 (fr) 2000-11-03
DE60005511D1 (de) 2003-10-30
ES2208314T3 (es) 2004-06-16
FR2793054B1 (fr) 2001-06-29

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Legal Events

Date Code Title Description
B25D Requested change of name of applicant approved

Owner name: AXALTO S.A. (FR)

Free format text: ALTERADO DE: SCHLUMBERGER SYSTEMES

B07A Application suspended after technical examination (opinion) [chapter 7.1 patent gazette]
B09B Patent application refused [chapter 9.2 patent gazette]

Free format text: INDEFIRO O PEDIDO DE ACORDO COM O ARTIGO 8O COMBINADO COM ARTIGO 13 DA LPI.

B25F Entry of change of name and/or headquarter and transfer of application, patent and certif. of addition of invention: change of name on requirement

Owner name: AXALTO S.A. (FR)

Free format text: A FIM DE ATENDER AS ALTERACOES DE NOME E ENDERECO REQUERIDAS ATRAVES DA PETICAO NO 20120081386/RJ, DE 30/08/2012, E NECESSARIO APRESENTAR A DOCUMENTACAO DEVIDAMENTE NOTARIZADA E UMA GUIA RELATIVA AO SEGUNDO SERVICO SOLICITADO.

B25E Requested change of name of applicant rejected

Owner name: AXALTO S.A. (FR)

Free format text: INDEFERIDO O PEDIDO DE ALTERACAO DE NOME E ENDERECO CONTIDO NA PETICAO 20120081386/RJ DE 30/08/2012, POR AUSENCIA DE CUMPRIMENTO DA EXIGENCIA PUBLICADA NA RPI NO 2202, DE 19/03/2013.

B12B Appeal against refusal [chapter 12.2 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

Free format text: PRAZO DE VALIDADE: 10 (DEZ) ANOS CONTADOS A PARTIR DE 06/09/2016, OBSERVADAS AS CONDICOES LEGAIS.