BR0006138A - Método e aparelho de intercalação para uso em codificador de código convolucional concatenado em série em um sistema de comunicação móvel - Google Patents

Método e aparelho de intercalação para uso em codificador de código convolucional concatenado em série em um sistema de comunicação móvel

Info

Publication number
BR0006138A
BR0006138A BR0006138-7A BR0006138A BR0006138A BR 0006138 A BR0006138 A BR 0006138A BR 0006138 A BR0006138 A BR 0006138A BR 0006138 A BR0006138 A BR 0006138A
Authority
BR
Brazil
Prior art keywords
groups
row
interleaver
encoder
communication system
Prior art date
Application number
BR0006138-7A
Other languages
English (en)
Inventor
Beong-Jo Kim
Min-Goo Kim
Young-Hwan Lee
Se-Hyoung Kim
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of BR0006138A publication Critical patent/BR0006138A/pt

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2771—Internal interleaver for turbo codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/23—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using convolutional codes, e.g. unit memory codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2742—Irregular interleaver wherein the permutation pattern is not obtained by a computation rule, e.g. interleaver based on random generators
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/276—Interleaving address generation
    • H03M13/2764—Circuits therefore

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Detection And Correction Of Errors (AREA)

Abstract

<B>MéTODO E APARELHO DE INTERCALAçãO PARA USO EM CODIFICADOR DE CóDIGO CONVOLUCIONAL CONCATENADO EM SéRIE EM UM SISTEMA DE COMUNICAçãO MóVEL<D> é revelado um intercalador para um codificador de código convolucional concatenado em série (SCCC). O intercalador tem uma memória com grupos de fileira m e grupos de coluna n, e a memória armazena símbolos de entrada em série nos gupos. O intercalador seleciona aleatoriamente um dos grupos de fileira m, a seguir seleciona aleatoriamente uma das posições na fileira selecionada, então transmite o símbolo armazenado na posição selecionada na fileira selecionada de modo a gerar símbolos intercalados. O codificador SCCC inclui um codificador de componente para codificar os símbolos intercalados do intercalador. O codificador de componente tem uma distância livre efetiva dos códigos codificados. Quando o número dos símbolos de entrada em série é k, os grupos de fileira m e grupos de coluna n na memória são escolhidos de tal modo que m x n <242> k, e m é maior do que a distância livre efetiva.
BR0006138-7A 1999-05-20 2000-05-20 Método e aparelho de intercalação para uso em codificador de código convolucional concatenado em série em um sistema de comunicação móvel BR0006138A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-1999-0019095A KR100526512B1 (ko) 1999-05-20 1999-05-20 이동 통신시스템의 직렬 쇄상 컨볼루션 부호화를 위한 인터리빙장치 및 방법
PCT/KR2000/000509 WO2000072448A1 (en) 1999-05-20 2000-05-20 Interleaving apparatus and method for use in serial concatenated convolutional code encoder in a mobile communication system

Publications (1)

Publication Number Publication Date
BR0006138A true BR0006138A (pt) 2001-04-03

Family

ID=19587943

Family Applications (1)

Application Number Title Priority Date Filing Date
BR0006138-7A BR0006138A (pt) 1999-05-20 2000-05-20 Método e aparelho de intercalação para uso em codificador de código convolucional concatenado em série em um sistema de comunicação móvel

Country Status (9)

Country Link
US (1) US6323788B1 (pt)
EP (1) EP1097517A4 (pt)
JP (1) JP3359913B1 (pt)
KR (1) KR100526512B1 (pt)
CN (1) CN1136660C (pt)
AU (1) AU758085B2 (pt)
BR (1) BR0006138A (pt)
CA (1) CA2337161C (pt)
WO (1) WO2000072448A1 (pt)

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US6570927B1 (en) * 1998-09-24 2003-05-27 Lockheed Martin Corporation Method for tail-biting and decoding recursive systematic codes
US6871303B2 (en) * 1998-12-04 2005-03-22 Qualcomm Incorporated Random-access multi-directional CDMA2000 turbo code interleaver
US6829305B2 (en) * 1999-12-08 2004-12-07 Lg Electronics Inc. Concatenated convolutional encoder and decoder of mobile communication system
US6789218B1 (en) * 2000-01-03 2004-09-07 Icoding Technology, Inc. High spread highly randomized generatable interleavers
US7302621B2 (en) * 2000-01-03 2007-11-27 Icoding Technology, Inc. High spread highly randomized generatable interleavers
US7549107B1 (en) * 2000-05-18 2009-06-16 Broadcom Corporation Interleaved reed solomon coding for home networking
US7184101B2 (en) * 2001-07-31 2007-02-27 Micronas Usa, Inc. Address generation for video processing
US6701482B2 (en) * 2001-09-20 2004-03-02 Qualcomm Incorporated Method and apparatus for coding bits of data in parallel
US6954885B2 (en) * 2001-12-14 2005-10-11 Qualcomm Incorporated Method and apparatus for coding bits of data in parallel
WO2003096597A1 (fr) * 2002-05-10 2003-11-20 Linkair Communications, Inc. Procede et dispositif d'entrelacement interne dans un code de convolution concatene en serie
WO2004025839A1 (en) * 2002-09-09 2004-03-25 Telefonaktiebolaget Lm Ericsson (Publ) Speed and memory optimised interleaving
US7216282B2 (en) * 2003-02-19 2007-05-08 Harris Corporation Mobile ad-hoc network (MANET) including forward error correction (FEC), interleaving, and multi-route communication features and related methods
US6759974B1 (en) * 2003-05-20 2004-07-06 Northrop Grumman Corporation Encoder and decoder for data transfer in superconductor circuits
CN100367676C (zh) * 2004-05-27 2008-02-06 中国科学院计算技术研究所 一种卷积码的编码方法
US7437650B2 (en) * 2005-04-12 2008-10-14 Agere Systems Inc. Pre-emptive interleaver address generator for turbo decoders
JP2008160169A (ja) * 2006-11-29 2008-07-10 Mitsubishi Electric Corp 通信装置、ターボ符号器および通信方法
US7870458B2 (en) * 2007-03-14 2011-01-11 Harris Corporation Parallel arrangement of serial concatenated convolutional code decoders with optimized organization of data for efficient use of memory resources
US7904784B2 (en) * 2007-03-14 2011-03-08 Harris Corporation Serial concatenated convolutional code decoder
US8024636B2 (en) * 2007-05-04 2011-09-20 Harris Corporation Serially concatenated convolutional code decoder with a constrained permutation table
US8205132B2 (en) 2007-05-07 2012-06-19 Lingna Holdings Pte., Llc Cooperative concatenated coding for wireless systems
US7991082B2 (en) * 2007-10-31 2011-08-02 Harris Corporation Maximum a posteriori probability decoder
KR101355633B1 (ko) 2007-11-06 2014-01-29 삼성전자주식회사 인코더 및 인코딩 방법
KR101648448B1 (ko) * 2008-04-29 2016-08-16 엘지전자 주식회사 송/수신 시스템 및 데이터 처리 방법
US7667628B2 (en) * 2008-06-23 2010-02-23 Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. Interleaver for scrambling and information word
US8429510B2 (en) * 2010-10-26 2013-04-23 Lsi Corporation Simplified parallel address-generation for interleaver
IN2012DE00954A (pt) * 2012-03-29 2015-09-11 Samsung India Electronics Pvt Ltd
KR102205614B1 (ko) * 2014-09-19 2021-01-21 삼성전자주식회사 반복 복호를 사용하는 비트 인터리빙 부호화 변조 방식을 지원하는 통신 시스템에서 신호 송/수신 장치 및 방법
KR101558172B1 (ko) * 2014-10-14 2015-10-08 숭실대학교산학협력단 오류 분산을 위한 인터리빙 방법 및 장치, 이를 수행하기 위한 기록매체
WO2018187902A1 (en) 2017-04-10 2018-10-18 Qualcomm Incorporated An efficient interleaver design for polar codes
TWI754900B (zh) * 2020-01-17 2022-02-11 旺宏電子股份有限公司 亂數產生器、亂數產生電路及亂數產生方法

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Also Published As

Publication number Publication date
AU4621800A (en) 2000-12-12
WO2000072448A1 (en) 2000-11-30
AU758085B2 (en) 2003-03-13
US6323788B1 (en) 2001-11-27
JP3359913B1 (ja) 2002-12-24
EP1097517A1 (en) 2001-05-09
CA2337161A1 (en) 2000-11-30
CN1136660C (zh) 2004-01-28
EP1097517A4 (en) 2002-06-12
KR100526512B1 (ko) 2005-11-08
CN1306698A (zh) 2001-08-01
KR20000074862A (ko) 2000-12-15
JP2003500971A (ja) 2003-01-07
CA2337161C (en) 2006-02-07

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