WO2003096597A1 - Procede et dispositif d'entrelacement interne dans un code de convolution concatene en serie - Google Patents

Procede et dispositif d'entrelacement interne dans un code de convolution concatene en serie Download PDF

Info

Publication number
WO2003096597A1
WO2003096597A1 PCT/CN2002/000324 CN0200324W WO03096597A1 WO 2003096597 A1 WO2003096597 A1 WO 2003096597A1 CN 0200324 W CN0200324 W CN 0200324W WO 03096597 A1 WO03096597 A1 WO 03096597A1
Authority
WO
WIPO (PCT)
Prior art keywords
output
interleaver
encoder
truncation
information bit
Prior art date
Application number
PCT/CN2002/000324
Other languages
English (en)
Chinese (zh)
Inventor
Yi Li
Yongsheng Zhang
Original Assignee
Linkair Communications, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Linkair Communications, Inc. filed Critical Linkair Communications, Inc.
Priority to CN02819175.7A priority Critical patent/CN1561598A/zh
Priority to AU2002257504A priority patent/AU2002257504A1/en
Priority to PCT/CN2002/000324 priority patent/WO2003096597A1/fr
Publication of WO2003096597A1 publication Critical patent/WO2003096597A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0059—Convolutional codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0064—Concatenated codes
    • H04L1/0065—Serial concatenated codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0067—Rate matching
    • H04L1/0068—Rate matching by puncturing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving

Definitions

  • the present invention belongs to the field of communication technology, and particularly relates to a method for interleaving in serial concatenated codes used in digital communication systems, and more particularly, to a method and an apparatus for interleaving in serial concatenated convolutional codes (SCCC).
  • SCCC serial concatenated convolutional codes
  • Channel error correction coding is an important part of communication systems.
  • the turbo code proposed by C. Berrou et al. That is, the parallel concatenated convolutional code, has received close attention due to its superior error correction performance and has been widely used in the fields of deep space communication and mobile communication.
  • the role of the internal interleaver in Turbo codes is very important.
  • the design of the inner interleaver of the Turbo code with truncation processing is proposed. While researching Turbo codes, people have also applied their ideas to the design of serial convolutional convolutional codes, but there are few documents about the design of interleavers in serial convolutional convolutional codes.
  • An object of the present invention is to provide a method and a device for interleaving in serial concatenated convolutional codes. It is used to improve the error correction performance of serial concatenated convolutional codes (SCCC).
  • SCCC serial concatenated convolutional codes
  • a method for interleaving within a serial concatenated convolutional code includes: encoding an input information bit sequence, interleaving the encoded output data after truncation and multiplexing, encoding the interleaved data, and encoding the The data is truncated and multiplexed to output a concatenated encoding output sequence;
  • the interleaving needs to meet the following conditions: in the concatenated coding output sequence, the number of check protection bits for each information bit is equal;
  • Each randomly generated replacement position (0 must be compared with the S values in front of it ⁇ -1), ⁇ ( ⁇ -2), r (f-5), and compared with: 7 ⁇ (- ⁇ '- 7)
  • ⁇ j l, 2, ..., S.
  • the search time of the pseudo-random s interleaver will greatly increase. Generally selected.
  • making the number of check protection bits for each information bit equal means that: the number of check protection bits for each information bit should be made equal.
  • the number of check protection bits of the information bits is not equal, you need to change the truncation mode so that the number of check protection bits for each information bit is equal. If you change the truncation mode, check protection of each information bit The number of bits is still not equal, so it is necessary to make the number of check protection bits for each adjacent information bit equal.
  • the encoding may be RSC encoding, or may be any other convolution encoding.
  • a device for interleaving within a serial concatenated convolutional code including: an encoder, an interleaver, a truncation and multiplexing device, wherein: an information bit sequence is an input to an encoder, and output data of the encoder is a The input of the truncation and multiplexing device, the output of the truncation and multiplexing device is the input of the interleaver, the output of the interleaver is the input of another encoder, and the output of the other encoder is another truncation and complex To the input of the connection device, the other interception and the multiplexing device output to cascade the encoded sequence.
  • the encoder may be an RSC encoder, or may be any other convolutional encoder.
  • the beneficial effect of the present invention is that the error correction performance of the serial concatenated convolutional code (SCCC) is greatly improved, and its effect is particularly significant when long frame data with a low error rate.
  • SCCC serial concatenated convolutional code
  • Figure 2 is a matrix of a packet interleaver
  • Figure 3 is the truncation matrix of the SCCC outer encoder at a half code rate
  • Figure 4 shows the truncation matrix of the inner encoder of SCCC with half code rate.
  • the serial concatenated convolutional code is composed of two convolutional codes that are serially concatenated and an internal interleaver connecting them. Its structure is shown in Figure 1.
  • the input information bit sequence u k is sent to the outer encoder of the SCCC, and the output x lk of the outer encoder. ut and x 2k _. ut is truncated and multiplexed and sent to the interleaver for interleaving.
  • the interleaved data ⁇ is sent to the inner encoder of the SCCC.
  • the output of the inner encoder ⁇ and ⁇ are truncated and Output after multiplexing.
  • the output produced by each sub-encoder can be processed by a truncation matrix.
  • the outer encoder and the inner encoder here use a system feedback convolutional code (RSC) with a half code rate.
  • RSC system feedback convolutional code
  • the inner encoder and the outer encoder can use any convolutional coding.
  • the interleaver in digital communication is a single-in-single-out device. It reorders the elements in the input sequence to obtain the output sequence. The elements in the output sequence and the elements in the input sequence are the same, but the positions of the elements are different.
  • the output of the interleaver at time i be ⁇
  • the interleaver can be described by the following set: f. 1 ⁇ ' ⁇ N ⁇ 1 ) (1)
  • the sequence of r is written into an X line in the order of the line
  • the matrix in column Y is then read out in the order of the columns.
  • a pseudo-random interleaver of length N is a random arrangement of N integers from 0 to N-1.
  • the pseudo-random S interleaver has some restrictions on the pseudo-random interleaver. It requires that each randomly generated replacement position must be equal to the preceding S values ⁇ ( ⁇ - ⁇ ), ⁇ ( ⁇ -2), ...,-6) Compare and meet the conditions:
  • the search time of the pseudo-random S interleaver will greatly increase.
  • SCCC for the pseudo-random S interleaver for equal protection, in SCCC, if two RSC component codes with half code rate are used for concatenation, SCCC with a total code rate of one quarter code rate is obtained. . If you want to get a bit rate higher than a quarter, you must perform proper truncation processing on the SCCC's inner and outer encoders.
  • SCCC with a half code rate as an example to explain the interleaving method and device for equalizing and protecting a pseudo-random S interleaver.
  • the truncation matrices of the inner and outer encoders of the half code rate SCCC are shown in Figure 3.
  • "0" in the matrix indicates that the bit is to be truncated
  • " ⁇ indicates that the bit is reserved
  • the matrix has two rows
  • the first and second rows of the matrix correspond to one-half component code encoding, respectively. Since the first and second outputs of the converter are RSC codes, the first row of the matrix corresponds to the information bit output, and the second row of the matrix corresponds to the check bit output.
  • Table 4 Number of symbols related to each information symbol in the output (using interleaver ⁇ ) ⁇ ) Information symbol Ui 3 ⁇ 4 u 4 u 5 u 6
  • the interleaver 3 ⁇ 4 when used, the number of symbols related to each information bit in the symbols output by the concatenated coding is equal, that is, the protection of each information symbol is balanced of.
  • the corresponding interleaver can be designed according to different truncation methods so that the protection of each symbol of the information symbols output by the concatenated coding is as balanced as possible.
  • This kind of interleaver is called a pseudo-random S interleaver for balanced protection.
  • the SCCC with half of the total code rate is taken as an example to illustrate the design of equalization protection of the pseudo-random S interleaver in the serial concatenated convolutional code with truncation processing.
  • an interleaver In other SCCCs that achieve high bit rates through truncation processing, an interleaver can be designed in a similar way. The following conclusions are summarized as follows: In serial concatenated convolutional codes with truncation processing, the interleaving The design of the device should: 1. Ensure that the number of check protection bits for each information bit in the encoded output sequence is equal. If this cannot be done, see if changing the truncation method can do this. If this is not possible, the number of check protection bits for each adjacent information bit in the coded output sequence should be made as equal as possible. 1. Meet the conditions of a pseudo-random S interleaver.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)

Abstract

L'invention se rapporte à un procédé et à un dispositif d'entrelacement interne dans un code de convolution concaténé en série (SCCC). Ledit procédé comprend les étapes suivantes: une séquence binaire d'informations saisie est codée, les données de sortie codées sont entrelacées par perforation et reconnexion, puis les données entrelacées sont codées, les données codées sont perforées et reconnectées à nouveau aux fins de la production en sortie d'une séquence de sortie concaténée. Le procédé se caractérise en ce que ledit entrelacement doit satisfaire la condition suivante: dans la séquence de sortie du code concaténée, le bit de parité pour chaque bit d'information est le même; et la condition de l'entrelaceur S pseudo-aléatoire est satisfaite. Cette invention permet des performances en termes de correction d'erreurs qui sont bien supérieures à celles d'un entrelaceur de paquets, d'un entrelaceur pseudo-aléatoire et d'un entrelaceur S pseudo-aléatoire. Ceci s'avère particulièrement intéressant dans le cas de données longues ayant un taux d'erreur faible.
PCT/CN2002/000324 2002-05-10 2002-05-10 Procede et dispositif d'entrelacement interne dans un code de convolution concatene en serie WO2003096597A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN02819175.7A CN1561598A (zh) 2002-05-10 2002-05-10 一种串行级联卷积码内交织的方法及装置
AU2002257504A AU2002257504A1 (en) 2002-05-10 2002-05-10 A method and device for inner interleave in serial concatenated convolutional code
PCT/CN2002/000324 WO2003096597A1 (fr) 2002-05-10 2002-05-10 Procede et dispositif d'entrelacement interne dans un code de convolution concatene en serie

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2002/000324 WO2003096597A1 (fr) 2002-05-10 2002-05-10 Procede et dispositif d'entrelacement interne dans un code de convolution concatene en serie

Publications (1)

Publication Number Publication Date
WO2003096597A1 true WO2003096597A1 (fr) 2003-11-20

Family

ID=29410174

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2002/000324 WO2003096597A1 (fr) 2002-05-10 2002-05-10 Procede et dispositif d'entrelacement interne dans un code de convolution concatene en serie

Country Status (3)

Country Link
CN (1) CN1561598A (fr)
AU (1) AU2002257504A1 (fr)
WO (1) WO2003096597A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103199937A (zh) * 2013-04-02 2013-07-10 武汉邮电科学研究院 高灵敏度的光发射接收装置及实现方法
US9916240B2 (en) 2011-07-29 2018-03-13 Huawei Technologies Co., Ltd. Interleaver and de-interleaver for correcting a burst bit error

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7774689B2 (en) * 2006-03-17 2010-08-10 Industrial Technology Research Institute Encoding and decoding methods and systems
CN103236900B (zh) * 2013-04-07 2016-03-30 电子科技大学 一种串行级联Turbo码交织器参数盲估计方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6202189B1 (en) * 1998-12-17 2001-03-13 Teledesic Llc Punctured serial concatenated convolutional coding system and method for low-earth-orbit satellite data communication
WO2001033737A1 (fr) * 1999-11-04 2001-05-10 Xm Satellite Radio Inc. Procede et dispositif d'entrelacement et de codage convolutionnel a concatenation
CN1306698A (zh) * 1999-05-20 2001-08-01 三星电子株式会社 移动通信系统中用于串行链接卷积码编码器中的交错装置和方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6202189B1 (en) * 1998-12-17 2001-03-13 Teledesic Llc Punctured serial concatenated convolutional coding system and method for low-earth-orbit satellite data communication
CN1306698A (zh) * 1999-05-20 2001-08-01 三星电子株式会社 移动通信系统中用于串行链接卷积码编码器中的交错装置和方法
WO2001033737A1 (fr) * 1999-11-04 2001-05-10 Xm Satellite Radio Inc. Procede et dispositif d'entrelacement et de codage convolutionnel a concatenation

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9916240B2 (en) 2011-07-29 2018-03-13 Huawei Technologies Co., Ltd. Interleaver and de-interleaver for correcting a burst bit error
CN103199937A (zh) * 2013-04-02 2013-07-10 武汉邮电科学研究院 高灵敏度的光发射接收装置及实现方法
CN103199937B (zh) * 2013-04-02 2015-04-15 武汉邮电科学研究院 高灵敏度的光发射接收装置及实现方法

Also Published As

Publication number Publication date
AU2002257504A1 (en) 2003-11-11
CN1561598A (zh) 2005-01-05

Similar Documents

Publication Publication Date Title
EP1538757B1 (fr) Adaptation de débit et entrelacement de canal pour un système de communication
EP1601109B1 (fr) Méthode et appareil de codage canal adaptifs
EP1101321B1 (fr) Dispositif de mise en correspondance et procede pour un systeme de communication de donnees
CN101075857B (zh) 一种turbo码的块交织及HARQ包生成方法
EP2323265B1 (fr) Desentrelaceur multisymbole efficace
CN103414478A (zh) 具有速率匹配的高计算效率的卷积编码
EP1048114B1 (fr) Dispositif et procede d'insertion de bits prealablement connus dans l'etage d'entree d'un codeur de canaux
EP0887966A1 (fr) Procédé et dispositif de codage convolutionel
WO2011026375A1 (fr) Procédés et dispositifs de codage et de décodage
US8166373B2 (en) Method and apparatus for turbo encoding and decoding
US20010034868A1 (en) Interleaver design for parsed parallel concatenated codes
CN107615691A (zh) 基于不等差错保护的数据传输方法、装置和设备
WO2007118378A1 (fr) Procédé et appareil de codage en cascade
EP1537673B1 (fr) Procede d'entrelacement et/ou de desentrelacement dans un systeme de communication
KR100628201B1 (ko) 터보 디코딩 방법
WO2002099994A1 (fr) Systeme et procede d'entrelacement de donnees utilise dans un emetteur sans fil
WO2003096597A1 (fr) Procede et dispositif d'entrelacement interne dans un code de convolution concatene en serie
Wang et al. On design of interleavers with practical size for turbo codes
CN1180538C (zh) 自适应涡轮编码和解码
WO2009012692A1 (fr) Dispositif de codage de code turbo et procédé correspondant
CN105680988B (zh) 一种延迟可调的编码方法
CN100359831C (zh) 均匀插入比特的并行级联码交织方法及交织器
JP4580420B2 (ja) 改良されたｕｍｔｓベースのインターリービングに基づく連結ジグザグ符号のための符号器および復号器
EP2315361A1 (fr) Procédé et dispositif de poinçonnage de flux binaire turbocodé
CN117118463A (zh) 一种基于多重混联校验码的信道编译码装置及方法

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ OM PH PL PT RO RU SD SE SG SI SK SL TJ TM TN TR TT TZ UA UG US UZ VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 20028191757

Country of ref document: CN

122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP