BR0006012A - Aparelho e método de intercalação / desintercalação para um sistema de comunicação - Google Patents
Aparelho e método de intercalação / desintercalação para um sistema de comunicaçãoInfo
- Publication number
- BR0006012A BR0006012A BR0006012A BR0006012A BR0006012A BR 0006012 A BR0006012 A BR 0006012A BR 0006012 A BR0006012 A BR 0006012A BR 0006012 A BR0006012 A BR 0006012A BR 0006012 A BR0006012 A BR 0006012A
- Authority
- BR
- Brazil
- Prior art keywords
- addresses
- interleaving
- address
- size
- communication system
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2771—Internal interleaver for turbo codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/276—Interleaving address generation
- H03M13/2764—Circuits therefore
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Detection And Correction Of Errors (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Abstract
<B>APARELHO E MéTODO DE INTERCALAçãO / DESINTERCALAçãO PARA UM SISTEMA DE COMUNICAçãO<D> Um dispositivo para a geração de L endereços, os quais são menores em número do que 2^ m^ x N~ g~ endereços virtuais, para a leitura de dados a partir de uma memória de intercalador, na qual L bits de dados são armazenados, o dispositivo incluindo: N~ g~ geradores de PN, cada um incluindo m memórias; um gerador de endereço, para a adição de um valor de deslocamento ao tamanho de dado de entrada, para prover um endereço virtual, que tem um tamanho de um múltiplo de 2^ m^, e gerando outros endereços que não os endereços correspondentes ao valor de deslocamento em áreas de geração de endereço, usando as áreas de geração de endereço que têm o tamanho de 2^ m^; e meios para a leitura de dados de entrada a partir da memória de intercalador, usando os endereços gerados a partir das áreas de geração de endereço.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR19990012858 | 1999-04-02 | ||
KR19990011798 | 1999-04-06 | ||
PCT/KR2000/000300 WO2000060750A1 (en) | 1999-04-02 | 2000-04-03 | Interleaving / deinterleaving apparatus and method for a communication system |
Publications (2)
Publication Number | Publication Date |
---|---|
BR0006012A true BR0006012A (pt) | 2001-03-06 |
BR0006012B1 BR0006012B1 (pt) | 2012-12-25 |
Family
ID=26634905
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR0006012A BR0006012B1 (pt) | 1999-04-02 | 2000-04-03 | aparelho e mÉtodo de intercalaÇço / desintercalaÇço para um sistema de comunicaÇço. |
Country Status (10)
Country | Link |
---|---|
US (1) | US6721908B1 (pt) |
EP (1) | EP1095460A4 (pt) |
JP (1) | JP3447269B2 (pt) |
CN (1) | CN1136663C (pt) |
AU (1) | AU745959B2 (pt) |
BR (1) | BR0006012B1 (pt) |
CA (1) | CA2333032C (pt) |
DE (1) | DE20023252U1 (pt) |
RU (1) | RU2210186C2 (pt) |
WO (1) | WO2000060750A1 (pt) |
Families Citing this family (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100306282B1 (ko) * | 1998-12-10 | 2001-11-02 | 윤종용 | 통신시스템의인터리빙/디인터리빙장치및방법 |
JP3095732B2 (ja) * | 1998-12-28 | 2000-10-10 | 株式会社東京精密 | 画像分配処理装置 |
AU2284301A (en) * | 2000-01-03 | 2001-07-16 | Icoding Technology, Inc. | System and method for high speed processing of turbo codes |
US7302621B2 (en) | 2000-01-03 | 2007-11-27 | Icoding Technology, Inc. | High spread highly randomized generatable interleavers |
US20020138807A1 (en) * | 2001-03-26 | 2002-09-26 | Quang Nguyen | Optimum UMTS modem |
EP1513260B1 (en) | 2001-10-10 | 2007-09-26 | Matsushita Electric Industrial Co., Ltd. | Interference decorrelation of multiple stream interpolated data |
JP3931100B2 (ja) * | 2002-03-12 | 2007-06-13 | 株式会社日立コミュニケーションテクノロジー | ターボ復号器並びにターボ符号器及びターボ符号器、復号器を含む無線基地局 |
RU2274951C2 (ru) * | 2002-10-29 | 2006-04-20 | Самсунг Электроникс Ко., Лтд. | Способ и устройство для деперемежения потока перемеженных данных в системе связи |
KR100532325B1 (ko) * | 2002-11-23 | 2005-11-29 | 삼성전자주식회사 | 터보 복호기의 입력 제어 방법 및 장치 |
US7123672B2 (en) * | 2003-04-30 | 2006-10-17 | Motorola, Inc. | Method and apparatus for facilitating efficient deinterleaving and diversity-combining of a data signal |
US8077743B2 (en) * | 2003-11-18 | 2011-12-13 | Qualcomm Incorporated | Method and apparatus for offset interleaving of vocoder frames |
US7343530B2 (en) * | 2004-02-10 | 2008-03-11 | Samsung Electronics Co., Ltd. | Turbo decoder and turbo interleaver |
US7702968B2 (en) | 2004-02-27 | 2010-04-20 | Qualcomm Incorporated | Efficient multi-symbol deinterleaver |
WO2005099099A1 (en) * | 2004-03-05 | 2005-10-20 | Thomson Licensing | Address generation apparatus for turbo interleaver and deinterleaver in w-cdma systems |
US7081597B2 (en) * | 2004-09-03 | 2006-07-25 | The Esab Group, Inc. | Electrode and electrode holder with threaded connection |
US7552377B1 (en) * | 2005-02-10 | 2009-06-23 | Xilinx, Inc. | Method of and circuit for interleaving data in a data coder |
US7437650B2 (en) * | 2005-04-12 | 2008-10-14 | Agere Systems Inc. | Pre-emptive interleaver address generator for turbo decoders |
US7395461B2 (en) * | 2005-05-18 | 2008-07-01 | Seagate Technology Llc | Low complexity pseudo-random interleaver |
US7949926B2 (en) * | 2006-11-30 | 2011-05-24 | Motorola Mobility, Inc. | Method and apparatus for encoding and decoding data |
US8249513B2 (en) * | 2007-08-13 | 2012-08-21 | Samsung Electronics Co., Ltd. | System and method for training different types of directional antennas that adapts the training sequence length to the number of antennas |
US8027394B2 (en) * | 2007-09-25 | 2011-09-27 | Silicon Laboratories Inc. | Reducing data stream jitter during deinterleaving |
US8787181B2 (en) * | 2008-01-14 | 2014-07-22 | Qualcomm Incorporated | Resource allocation randomization |
US8165595B2 (en) * | 2008-01-25 | 2012-04-24 | Samsung Electronics Co., Ltd. | System and method for multi-stage antenna training of beamforming vectors |
US8051037B2 (en) * | 2008-01-25 | 2011-11-01 | Samsung Electronics Co., Ltd. | System and method for pseudorandom permutation for interleaving in wireless communications |
US8280445B2 (en) * | 2008-02-13 | 2012-10-02 | Samsung Electronics Co., Ltd. | System and method for antenna training of beamforming vectors by selective use of beam level training |
US8478204B2 (en) * | 2008-07-14 | 2013-07-02 | Samsung Electronics Co., Ltd. | System and method for antenna training of beamforming vectors having reuse of directional information |
US8237869B2 (en) | 2010-03-31 | 2012-08-07 | Silicon Laboratories Inc. | Multi-standard digital demodulator for TV signals broadcast over cable, satellite and terrestrial networks |
US8341486B2 (en) | 2010-03-31 | 2012-12-25 | Silicon Laboratories Inc. | Reducing power consumption in an iterative decoder |
US8555131B2 (en) | 2010-03-31 | 2013-10-08 | Silicon Laboratories Inc. | Techniques to control power consumption in an iterative decoder by control of node configurations |
US8433970B2 (en) | 2010-03-31 | 2013-04-30 | Silicon Laboratories Inc. | Techniques to control power consumption in an iterative decoder by control of node configurations |
US8837611B2 (en) | 2011-02-09 | 2014-09-16 | Silicon Laboratories Inc. | Memory-aided synchronization in a receiver |
TWI457407B (zh) | 2011-07-27 | 2014-10-21 | Wistron Corp | 單液型油墨與其製法、薄膜的形成方法 |
US8644370B2 (en) | 2012-01-25 | 2014-02-04 | Silicon Laboratories | Providing slope values for a demapper |
US8959274B2 (en) | 2012-09-06 | 2015-02-17 | Silicon Laboratories Inc. | Providing a serial download path to devices |
CN106375243B (zh) * | 2015-07-22 | 2019-09-03 | 华为技术有限公司 | 数据处理设备和光传送网络交换机 |
US11023241B2 (en) * | 2018-08-21 | 2021-06-01 | Advanced Micro Devices, Inc. | Systems and methods for selectively bypassing address-generation hardware in processor instruction pipelines |
KR20200046481A (ko) * | 2018-10-24 | 2020-05-07 | 삼성전자주식회사 | 난수 생성기, 이를 포함하는 암호화 장치 및 이의 동작 방법 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0430231A (ja) * | 1990-05-25 | 1992-02-03 | Hitachi Ltd | 主記憶アドレッシング方式 |
FR2675971B1 (fr) | 1991-04-23 | 1993-08-06 | France Telecom | Procede de codage correcteur d'erreurs a au moins deux codages convolutifs systematiques en parallele, procede de decodage iteratif, module de decodage et decodeur correspondants. |
JPH09102748A (ja) | 1995-10-04 | 1997-04-15 | Matsushita Electric Ind Co Ltd | インターリーブ回路 |
US6381668B1 (en) * | 1997-03-21 | 2002-04-30 | International Business Machines Corporation | Address mapping for system memory |
KR100237745B1 (ko) * | 1997-05-23 | 2000-01-15 | 김영환 | 회전형 인터리버/디인터리버의 메모리 주소 발생장치 및 그 방법 |
US6381728B1 (en) * | 1998-08-14 | 2002-04-30 | Qualcomm Incorporated | Partitioned interleaver memory for map decoder |
EP1046236B1 (en) * | 1998-08-17 | 2016-02-24 | Dtvg Licensing, Inc | Turbo code interleaver with near optimal performance |
US6353900B1 (en) * | 1998-09-22 | 2002-03-05 | Qualcomm Incorporated | Coding system having state machine based interleaver |
US6314534B1 (en) * | 1999-03-31 | 2001-11-06 | Qualcomm Incorporated | Generalized address generation for bit reversed random interleaving |
-
2000
- 2000-04-03 RU RU2000130215A patent/RU2210186C2/ru active
- 2000-04-03 EP EP00915575A patent/EP1095460A4/en not_active Ceased
- 2000-04-03 CN CNB008004676A patent/CN1136663C/zh not_active Expired - Lifetime
- 2000-04-03 WO PCT/KR2000/000300 patent/WO2000060750A1/en active Application Filing
- 2000-04-03 JP JP2000610133A patent/JP3447269B2/ja not_active Expired - Lifetime
- 2000-04-03 DE DE20023252U patent/DE20023252U1/de not_active Expired - Lifetime
- 2000-04-03 CA CA002333032A patent/CA2333032C/en not_active Expired - Lifetime
- 2000-04-03 US US09/541,816 patent/US6721908B1/en not_active Expired - Lifetime
- 2000-04-03 BR BR0006012A patent/BR0006012B1/pt not_active IP Right Cessation
- 2000-04-03 AU AU36816/00A patent/AU745959B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
EP1095460A1 (en) | 2001-05-02 |
CN1297617A (zh) | 2001-05-30 |
AU3681600A (en) | 2000-10-23 |
JP2002541710A (ja) | 2002-12-03 |
AU745959B2 (en) | 2002-04-11 |
CA2333032A1 (en) | 2000-10-12 |
US6721908B1 (en) | 2004-04-13 |
JP3447269B2 (ja) | 2003-09-16 |
WO2000060750A1 (en) | 2000-10-12 |
EP1095460A4 (en) | 2002-04-03 |
BR0006012B1 (pt) | 2012-12-25 |
CN1136663C (zh) | 2004-01-28 |
RU2210186C2 (ru) | 2003-08-10 |
DE20023252U1 (de) | 2003-07-31 |
CA2333032C (en) | 2005-11-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
B06A | Patent application procedure suspended [chapter 6.1 patent gazette] | ||
B09A | Decision: intention to grant [chapter 9.1 patent gazette] | ||
B16A | Patent or certificate of addition of invention granted [chapter 16.1 patent gazette] |
Free format text: PRAZO DE VALIDADE: 10 (DEZ) ANOS CONTADOS A PARTIR DE 26/12/2012, OBSERVADAS AS CONDICOES LEGAIS. |
|
B25A | Requested transfer of rights approved | ||
B21A | Patent or certificate of addition expired [chapter 21.1 patent gazette] |
Free format text: PATENTE EXTINTA EM 26/12/2022 |