BE881724A - Dispositif de diagnostic d'erreurs pour systeme de traitement de donnees - Google Patents

Dispositif de diagnostic d'erreurs pour systeme de traitement de donnees

Info

Publication number
BE881724A
BE881724A BE0/199401A BE199401A BE881724A BE 881724 A BE881724 A BE 881724A BE 0/199401 A BE0/199401 A BE 0/199401A BE 199401 A BE199401 A BE 199401A BE 881724 A BE881724 A BE 881724A
Authority
BE
Belgium
Prior art keywords
data processing
processing system
diagnostic device
error diagnostic
error
Prior art date
Application number
BE0/199401A
Other languages
English (en)
Inventor
M Miu
R King
J Bradley
Original Assignee
Honeywell Inf Systems
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Inf Systems filed Critical Honeywell Inf Systems
Publication of BE881724A publication Critical patent/BE881724A/fr

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/362Software debugging
    • G06F11/3648Software debugging using additional hardware
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Bus Control (AREA)
BE0/199401A 1979-02-16 1980-02-14 Dispositif de diagnostic d'erreurs pour systeme de traitement de donnees BE881724A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/012,676 US4387423A (en) 1979-02-16 1979-02-16 Microprogrammed system having single microstep apparatus

Publications (1)

Publication Number Publication Date
BE881724A true BE881724A (fr) 1980-05-30

Family

ID=21756154

Family Applications (1)

Application Number Title Priority Date Filing Date
BE0/199401A BE881724A (fr) 1979-02-16 1980-02-14 Dispositif de diagnostic d'erreurs pour systeme de traitement de donnees

Country Status (6)

Country Link
US (1) US4387423A (fr)
JP (1) JPS55110353A (fr)
AU (1) AU5557080A (fr)
BE (1) BE881724A (fr)
CA (1) CA1138116A (fr)
FR (1) FR2456973A1 (fr)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4567571A (en) * 1982-09-07 1986-01-28 Honeywell Information Systems, Inc. Memory control for refreshing in a step mode
US4625296A (en) * 1984-01-17 1986-11-25 The Perkin-Elmer Corporation Memory refresh circuit with varying system transparency
US4601018A (en) * 1985-01-29 1986-07-15 Allen Baum Banked memory circuit
US4720811A (en) * 1985-04-26 1988-01-19 Hitachi, Ltd. Microprocessor capable of stopping its operation at any cycle time
JPH0816882B2 (ja) * 1985-06-17 1996-02-21 株式会社日立製作所 半導体記憶装置
US5218712A (en) * 1987-07-01 1993-06-08 Digital Equipment Corporation Providing a data processor with a user-mode accessible mode of operations in which the processor performs processing operations without interruption
JPH0789328B2 (ja) * 1988-05-31 1995-09-27 日本電気株式会社 データ処理装置
US6151643A (en) 1996-06-07 2000-11-21 Networks Associates, Inc. Automatic updating of diverse software products on multiple client computer systems by downloading scanning application to client computer and generating software list on client computer
DE10234991B4 (de) * 2002-07-31 2008-07-31 Advanced Micro Devices, Inc., Sunnyvale Hostcontrollerdiagnose für einen seriellen Bus
FR2888960B1 (fr) * 2005-07-19 2007-10-12 Gemplus Sa Detection d'une faute par perturbation longue
US8077516B2 (en) * 2006-05-08 2011-12-13 Macronix International Co., Ltd. Method and apparatus for accessing memory with read error by changing comparison
US7773421B2 (en) * 2006-05-08 2010-08-10 Macronix International Co., Ltd. Method and apparatus for accessing memory with read error by changing comparison
JP2017090963A (ja) * 2015-11-02 2017-05-25 富士通株式会社 伝送装置及び故障診断方法
KR102399475B1 (ko) * 2015-12-28 2022-05-18 삼성전자주식회사 리프레쉬 콘트롤러 및 이를 포함하는 메모리 장치
CN111176970A (zh) * 2018-11-09 2020-05-19 北京天德科技有限公司 一种区块链测试架构及系统
US11392299B2 (en) 2019-12-20 2022-07-19 Micron Technology, Inc. Multi-purpose signaling for a memory system
CN113127344B (zh) * 2021-04-06 2023-06-09 华东师范大学 一种ros底层通讯机制的形式化建模与验证方法
US11811420B2 (en) * 2022-01-21 2023-11-07 Texas Instruments Incorporated Digital-to-analog converter with cascaded least significant bit (LSB) interpolator circuit

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3077984A (en) * 1960-02-12 1963-02-19 johnson
JPS4833341B1 (fr) * 1968-06-05 1973-10-13
US3859635A (en) * 1971-06-15 1975-01-07 Robert E Watson Programmable calculator
US3705392A (en) * 1971-09-07 1972-12-05 Texas Instruments Inc Mos dynamic memory
US3786430A (en) * 1971-11-15 1974-01-15 Ibm Data processing system including a small auxiliary processor for overcoming the effects of faulty hardware
DE2247835C3 (de) * 1972-09-29 1978-10-05 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Regenerieren der Speicherinhalte von MOS-Speichern und MOS-Speicher zur Durchführung dieses Verfahrens
US3810129A (en) * 1972-10-19 1974-05-07 Ibm Memory system restoration
US3813531A (en) * 1973-01-02 1974-05-28 Honeywell Inf Systems Diagnostic checking apparatus
US3846765A (en) * 1973-02-14 1974-11-05 Monolithic Syst Corp Dynamic cell semiconductor memory with interlace refresh
US3909802A (en) * 1974-04-08 1975-09-30 Honeywell Inf Systems Diagnostic maintenance and test apparatus
US3980935A (en) * 1974-12-16 1976-09-14 Worst Bernard I Volatile memory support system
US4048481A (en) * 1974-12-17 1977-09-13 Honeywell Information Systems Inc. Diagnostic testing apparatus and method
IT1041882B (it) * 1975-08-20 1980-01-10 Honeywell Inf Systems Memoria dinamica a semiconduttori e relativo sistema di recarica
JPS5283038A (en) * 1975-12-29 1977-07-11 Fujitsu Ltd Memory unit refresh control system
US4172282A (en) * 1976-10-29 1979-10-23 International Business Machines Corporation Processor controlled memory refresh

Also Published As

Publication number Publication date
US4387423A (en) 1983-06-07
FR2456973A1 (fr) 1980-12-12
JPS55110353A (en) 1980-08-25
CA1138116A (fr) 1982-12-21
AU5557080A (en) 1980-08-21

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Legal Events

Date Code Title Description
RE Patent lapsed

Owner name: HONEYWELL INFORMATION SYSTEMS INC.

Effective date: 19840214