BE848990A - Circuit de verrouillage du type a logique a mode de courant - Google Patents

Circuit de verrouillage du type a logique a mode de courant

Info

Publication number
BE848990A
BE848990A BE172906A BE172906A BE848990A BE 848990 A BE848990 A BE 848990A BE 172906 A BE172906 A BE 172906A BE 172906 A BE172906 A BE 172906A BE 848990 A BE848990 A BE 848990A
Authority
BE
Belgium
Prior art keywords
current mode
type locking
locking circuit
mode logic
logic type
Prior art date
Application number
BE172906A
Other languages
English (en)
French (fr)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BE848990A publication Critical patent/BE848990A/xx

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037Bistable circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00Methods or arrangements for data conversion without changing the order or content of the data handled
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086Emitter coupled logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Shift Register Type Memory (AREA)
  • Logic Circuits (AREA)
BE172906A 1975-12-02 1976-12-02 Circuit de verrouillage du type a logique a mode de courant BE848990A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/636,861 US3984702A (en) 1975-12-02 1975-12-02 N-bit register system using CML circuits

Publications (1)

Publication Number Publication Date
BE848990A true BE848990A (fr) 1977-04-01

Family

ID=24553646

Family Applications (1)

Application Number Title Priority Date Filing Date
BE172906A BE848990A (fr) 1975-12-02 1976-12-02 Circuit de verrouillage du type a logique a mode de courant

Country Status (7)

Country Link
US (1) US3984702A (xx)
JP (1) JPS5268335A (xx)
BE (1) BE848990A (xx)
CA (1) CA1066369A (xx)
DE (1) DE2654190A1 (xx)
FR (1) FR2334242A1 (xx)
GB (1) GB1506338A (xx)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5913118B2 (ja) * 1978-12-11 1984-03-27 ハネイウエル・インフオメ−シヨン・システムス・インコ−ポレ−テツド 付加的リセット能力および非機能テスト能力を有するj−k型マスタ−/スレ−ブレジスタ
US4311925A (en) * 1979-09-17 1982-01-19 International Business Machines Corporation Current switch emitter follower latch having output signals with reduced noise
US4495629A (en) * 1983-01-25 1985-01-22 Storage Technology Partners CMOS scannable latch
FR2581811A1 (fr) * 1985-05-10 1986-11-14 Radiotechnique Compelec Module multiplexeur numerique a n entrees et multiplexeur a n2 entrees incorporant de tels modules
JPH0683054B2 (ja) * 1985-12-20 1994-10-19 日本電気株式会社 論理レベル変換回路
US5130578A (en) * 1989-11-30 1992-07-14 Hughes Aircraft Company Efficient high speed N-word comparator
US5130568A (en) * 1990-11-05 1992-07-14 Vertex Semiconductor Corporation Scannable latch system and method
US6188260B1 (en) 1999-01-22 2001-02-13 Agilent Technologies Master-slave flip-flop and method
US7215170B1 (en) * 2003-09-16 2007-05-08 Cypress Semiconductor Corp. Low voltage logic circuit with set and/or reset functionality
US9490783B1 (en) * 2015-04-15 2016-11-08 Texas Instruments Incorporated Area efficient multi bit flip flop topologies

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3321639A (en) * 1962-12-03 1967-05-23 Gen Electric Direct coupled, current mode logic
US3505535A (en) * 1967-01-03 1970-04-07 Ibm Digital circuit with antisaturation collector load network
US3535546A (en) * 1968-02-12 1970-10-20 Control Data Corp Current mode logic
US3539824A (en) * 1968-09-03 1970-11-10 Gen Electric Current-mode data selector
US3599184A (en) * 1969-07-10 1971-08-10 Rca Corp Storage circuit
DE1941264C3 (de) * 1969-08-13 1975-07-17 Siemens Ag, 1000 Berlin Und 8000 Muenchen Asynchrone RS-Kippstufe in ECL-Technik
US3740590A (en) * 1971-12-17 1973-06-19 Ibm Latch circuit
US3760190A (en) * 1972-06-29 1973-09-18 Ibm Non-current summing multiple input latching circuit

Also Published As

Publication number Publication date
GB1506338A (en) 1978-04-05
FR2334242A1 (fr) 1977-07-01
DE2654190A1 (de) 1977-06-23
FR2334242B1 (xx) 1982-09-24
US3984702A (en) 1976-10-05
CA1066369A (en) 1979-11-13
JPS5268335A (en) 1977-06-07

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Legal Events

Date Code Title Description
RE Patent lapsed

Owner name: HONEYWELL INFORMATION SYSTEMS INC.

Effective date: 19851231