BE818885A - Procede pour realiser un dispositif a deplacement de charges dans la technique a deux phases - Google Patents

Procede pour realiser un dispositif a deplacement de charges dans la technique a deux phases

Info

Publication number
BE818885A
BE818885A BE147640A BE147640A BE818885A BE 818885 A BE818885 A BE 818885A BE 147640 A BE147640 A BE 147640A BE 147640 A BE147640 A BE 147640A BE 818885 A BE818885 A BE 818885A
Authority
BE
Belgium
Prior art keywords
making
shifting device
load shifting
phase technique
technique
Prior art date
Application number
BE147640A
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BE818885A publication Critical patent/BE818885A/fr

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/762Charge transfer devices
    • H01L29/765Charge-coupled devices
    • H01L29/768Charge-coupled devices with field effect produced by an insulated gate
    • H01L29/76866Surface Channel CCD
    • H01L29/76875Two-Phase CCD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1062Channel region of field-effect devices of charge coupled devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42396Gate electrodes for field effect devices for charge coupled devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/762Charge transfer devices
    • H01L29/765Charge-coupled devices
    • H01L29/768Charge-coupled devices with field effect produced by an insulated gate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/051Etching
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/143Shadow masking

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Solid State Image Pick-Up Elements (AREA)
BE147640A 1973-08-14 1974-08-14 Procede pour realiser un dispositif a deplacement de charges dans la technique a deux phases BE818885A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2341154A DE2341154C2 (de) 1973-08-14 1973-08-14 Verfahren zur Herstellung einer Zweiphasen-Ladungsverschiebeanordnung

Publications (1)

Publication Number Publication Date
BE818885A true BE818885A (fr) 1974-12-02

Family

ID=5889756

Family Applications (1)

Application Number Title Priority Date Filing Date
BE147640A BE818885A (fr) 1973-08-14 1974-08-14 Procede pour realiser un dispositif a deplacement de charges dans la technique a deux phases

Country Status (15)

Country Link
US (1) US3908262A (fr)
JP (1) JPS5051277A (fr)
AT (1) AT341580B (fr)
BE (1) BE818885A (fr)
CA (1) CA1001775A (fr)
CH (1) CH573662A5 (fr)
DE (1) DE2341154C2 (fr)
DK (1) DK139369C (fr)
FR (1) FR2241142B1 (fr)
GB (1) GB1444452A (fr)
IE (1) IE39610B1 (fr)
IT (1) IT1019904B (fr)
LU (1) LU70712A1 (fr)
NL (1) NL7410201A (fr)
SE (1) SE394766B (fr)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1534896A (en) * 1975-05-19 1978-12-06 Itt Direct metal contact to buried layer
US4035906A (en) * 1975-07-23 1977-07-19 Texas Instruments Incorporated Silicon gate CCD structure
US4027382A (en) * 1975-07-23 1977-06-07 Texas Instruments Incorporated Silicon gate CCD structure
US4060427A (en) * 1976-04-05 1977-11-29 Ibm Corporation Method of forming an integrated circuit region through the combination of ion implantation and diffusion steps
US4167017A (en) * 1976-06-01 1979-09-04 Texas Instruments Incorporated CCD structures with surface potential asymmetry beneath the phase electrodes
US4182023A (en) * 1977-10-21 1980-01-08 Ncr Corporation Process for minimum overlap silicon gate devices
US4525919A (en) * 1982-06-16 1985-07-02 Raytheon Company Forming sub-micron electrodes by oblique deposition
FR2571177B1 (fr) * 1984-10-02 1987-02-27 Thomson Csf Procede de realisation de grilles en siliciure ou en silicium pour circuit integre comportant des elements du type grille - isolant - semi-conducteur
WO1987001507A1 (fr) * 1985-08-27 1987-03-12 Lockheed Missiles & Space Company, Inc. Procedure d'alignement de portes dans la fabrication de dispositifs a semiconducteurs
NL8502765A (nl) * 1985-10-10 1987-05-04 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting.
JPH0834194B2 (ja) * 1989-06-30 1996-03-29 松下電器産業株式会社 イオン注入方法及び本方法を用いた半導体装置の製造方法
KR940010932B1 (ko) * 1991-12-23 1994-11-19 금성일렉트론주식회사 Ccd영상소자 제조방법
US5290358A (en) * 1992-09-30 1994-03-01 International Business Machines Corporation Apparatus for directional low pressure chemical vapor deposition (DLPCVD)
US5328854A (en) * 1993-03-31 1994-07-12 At&T Bell Laboratories Fabrication of electronic devices with an internal window
IL106892A0 (en) * 1993-09-02 1993-12-28 Pierre Badehi Methods and apparatus for producing integrated circuit devices
IL108359A (en) * 1994-01-17 2001-04-30 Shellcase Ltd Method and device for creating integrated circular devices
US5444007A (en) * 1994-08-03 1995-08-22 Kabushiki Kaisha Toshiba Formation of trenches having different profiles
US5668018A (en) * 1995-06-07 1997-09-16 International Business Machines Corporation Method for defining a region on a wall of a semiconductor structure
GB9512089D0 (en) * 1995-06-14 1995-08-09 Evans Jonathan L Semiconductor device fabrication
JP2965061B2 (ja) * 1996-04-19 1999-10-18 日本電気株式会社 電荷結合素子およびその製造方法
DE10115912A1 (de) * 2001-03-30 2002-10-17 Infineon Technologies Ag Verfahren zur Herstellung einer Halbleiteranordnung und Verwendung einer Ionenstrahlanlage zur Durchführung des Verfahrens

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2666814A (en) * 1949-04-27 1954-01-19 Bell Telephone Labor Inc Semiconductor translating device
GB1355806A (en) * 1970-12-09 1974-06-05 Mullard Ltd Methods of manufacturing a semiconductor device
US3796932A (en) * 1971-06-28 1974-03-12 Bell Telephone Labor Inc Charge coupled devices employing nonuniform concentrations of immobile charge along the information channel
US3851379A (en) * 1973-05-16 1974-12-03 Westinghouse Electric Corp Solid state components

Also Published As

Publication number Publication date
FR2241142A1 (fr) 1975-03-14
DK430874A (fr) 1975-04-14
DE2341154C2 (de) 1975-06-26
AT341580B (de) 1978-02-10
GB1444452A (en) 1976-07-28
NL7410201A (nl) 1975-02-18
DK139369C (da) 1979-08-20
DK139369B (da) 1979-02-05
US3908262A (en) 1975-09-30
FR2241142B1 (fr) 1977-10-14
SE7410186L (fr) 1975-02-17
JPS5051277A (fr) 1975-05-08
LU70712A1 (fr) 1974-12-10
CA1001775A (en) 1976-12-14
IE39610L (en) 1975-02-14
IT1019904B (it) 1977-11-30
IE39610B1 (en) 1978-11-22
ATA631774A (de) 1977-06-15
SE394766B (sv) 1977-07-04
CH573662A5 (fr) 1976-03-15
DE2341154B1 (de) 1974-11-07

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