AU5109100A - Apparatus for sealing semiconductor device - Google Patents

Apparatus for sealing semiconductor device

Info

Publication number
AU5109100A
AU5109100A AU51091/00A AU5109100A AU5109100A AU 5109100 A AU5109100 A AU 5109100A AU 51091/00 A AU51091/00 A AU 51091/00A AU 5109100 A AU5109100 A AU 5109100A AU 5109100 A AU5109100 A AU 5109100A
Authority
AU
Australia
Prior art keywords
semiconductor device
sealing semiconductor
sealing
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU51091/00A
Inventor
Atsushi Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nagase and Co Ltd
Original Assignee
Nagase and Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nagase and Co Ltd filed Critical Nagase and Co Ltd
Publication of AU5109100A publication Critical patent/AU5109100A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
AU51091/00A 2000-03-23 2000-06-12 Apparatus for sealing semiconductor device Abandoned AU5109100A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2000/81282 2000-03-23
JP2000081282 2000-03-23
PCT/JP2000/003817 WO2001071798A1 (en) 2000-03-23 2000-06-12 Apparatus for sealing semiconductor device

Publications (1)

Publication Number Publication Date
AU5109100A true AU5109100A (en) 2001-10-03

Family

ID=18598242

Family Applications (1)

Application Number Title Priority Date Filing Date
AU51091/00A Abandoned AU5109100A (en) 2000-03-23 2000-06-12 Apparatus for sealing semiconductor device

Country Status (3)

Country Link
JP (1) JP3646093B2 (en)
AU (1) AU5109100A (en)
WO (1) WO2001071798A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007311683A (en) * 2006-05-22 2007-11-29 Matsushita Electric Ind Co Ltd Sticking method and apparatus therefor

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10261661A (en) * 1997-03-19 1998-09-29 Toshiba Corp Underfill filling method and printed wiring board structure
JP3564980B2 (en) * 1997-11-28 2004-09-15 松下電工株式会社 Semiconductor chip mounting method
JP3495913B2 (en) * 1998-05-28 2004-02-09 シャープ株式会社 Resin sheet for mounting semiconductor devices

Also Published As

Publication number Publication date
JP3646093B2 (en) 2005-05-11
WO2001071798A1 (en) 2001-09-27

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase