AU3397697A - A method and apparatus for providing concurrent acces by a plurality of agents to a shared memory - Google Patents

A method and apparatus for providing concurrent acces by a plurality of agents to a shared memory

Info

Publication number
AU3397697A
AU3397697A AU33976/97A AU3397697A AU3397697A AU 3397697 A AU3397697 A AU 3397697A AU 33976/97 A AU33976/97 A AU 33976/97A AU 3397697 A AU3397697 A AU 3397697A AU 3397697 A AU3397697 A AU 3397697A
Authority
AU
Australia
Prior art keywords
acces
agents
shared memory
providing concurrent
concurrent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU33976/97A
Other languages
English (en)
Inventor
Kuljit Bains
Manish Muthal
Nilesh V. Shah
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of AU3397697A publication Critical patent/AU3397697A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1647—Handling requests for interconnection or transfer for access to memory bus based on arbitration with interleaved bank access

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Multi Processors (AREA)
  • Image Input (AREA)
  • Image Processing (AREA)
  • Dram (AREA)
AU33976/97A 1996-06-27 1997-06-13 A method and apparatus for providing concurrent acces by a plurality of agents to a shared memory Abandoned AU3397697A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/672,099 US5815167A (en) 1996-06-27 1996-06-27 Method and apparatus for providing concurrent access by a plurality of agents to a shared memory
US08672099 1996-06-27
PCT/US1997/010447 WO1997050042A1 (en) 1996-06-27 1997-06-13 A method and apparatus for providing concurrent access by a plur ality of agents to a shared memory

Publications (1)

Publication Number Publication Date
AU3397697A true AU3397697A (en) 1998-01-14

Family

ID=24697142

Family Applications (1)

Application Number Title Priority Date Filing Date
AU33976/97A Abandoned AU3397697A (en) 1996-06-27 1997-06-13 A method and apparatus for providing concurrent acces by a plurality of agents to a shared memory

Country Status (8)

Country Link
US (1) US5815167A (enExample)
EP (1) EP0972251B1 (enExample)
JP (1) JP3976342B2 (enExample)
KR (1) KR100317517B1 (enExample)
AU (1) AU3397697A (enExample)
DE (1) DE69724463T2 (enExample)
TW (1) TW358180B (enExample)
WO (1) WO1997050042A1 (enExample)

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US7071946B2 (en) * 1997-12-30 2006-07-04 Micron Technology, Inc. Accelerated graphics port for a multiple memory controller computer system
US6157398A (en) * 1997-12-30 2000-12-05 Micron Technology, Inc. Method of implementing an accelerated graphics port for a multiple memory controller computer system
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US6601147B1 (en) * 1999-03-31 2003-07-29 International Business Machines Corporation Computer system and method for maintaining an integrated shared buffer memory in a group of interconnected hosts
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US6469703B1 (en) * 1999-07-02 2002-10-22 Ati International Srl System of accessing data in a graphics system and method thereof
US6526462B1 (en) * 1999-11-19 2003-02-25 Hammam Elabd Programmable multi-tasking memory management system
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US7205993B2 (en) * 2001-02-15 2007-04-17 Sony Corporation Checkerboard buffer using two-dimensional buffer pages and using memory bank alternation
US6828977B2 (en) * 2001-02-15 2004-12-07 Sony Corporation Dynamic buffer pages
US6831649B2 (en) * 2001-02-15 2004-12-14 Sony Corporation Two-dimensional buffer pages using state addressing
US6765579B2 (en) * 2001-02-15 2004-07-20 Sony Corporation Pixel pages using combined addressing
US6992674B2 (en) * 2001-02-15 2006-01-31 Sony Corporation Checkerboard buffer using two-dimensional buffer pages and using state addressing
US6831651B2 (en) * 2001-02-15 2004-12-14 Sony Corporation Checkerboard buffer
US6801204B2 (en) * 2001-02-15 2004-10-05 Sony Corporation, A Japanese Corporation Checkerboard buffer using memory blocks
US6795079B2 (en) * 2001-02-15 2004-09-21 Sony Corporation Two-dimensional buffer pages
US6831650B2 (en) * 2001-02-15 2004-12-14 Sony Corporation Checkerboard buffer using sequential memory locations
US6803917B2 (en) * 2001-02-15 2004-10-12 Sony Corporation Checkerboard buffer using memory bank alternation
US6765580B2 (en) * 2001-02-15 2004-07-20 Sony Corporation Pixel pages optimized for GLV
US7038691B2 (en) * 2001-02-15 2006-05-02 Sony Corporation Two-dimensional buffer pages using memory bank alternation
US6850241B2 (en) * 2001-02-15 2005-02-01 Sony Corporation Swapped pixel pages
US7088369B2 (en) * 2001-02-15 2006-08-08 Sony Corporation Checkerboard buffer using two-dimensional buffer pages and using bit-field addressing
US6791557B2 (en) * 2001-02-15 2004-09-14 Sony Corporation Two-dimensional buffer pages using bit-field addressing
US7379069B2 (en) * 2001-02-15 2008-05-27 Sony Corporation Checkerboard buffer using two-dimensional buffer pages
US6768490B2 (en) * 2001-02-15 2004-07-27 Sony Corporation Checkerboard buffer using more than two memory devices
US6622203B2 (en) * 2001-05-29 2003-09-16 Agilent Technologies, Inc. Embedded memory access method and system for application specific integrated circuits
JP2003177958A (ja) * 2001-06-11 2003-06-27 Emblaze Semiconductor Ltd 特殊メモリデバイス
US20030058368A1 (en) * 2001-09-24 2003-03-27 Mark Champion Image warping using pixel pages
US6965980B2 (en) * 2002-02-14 2005-11-15 Sony Corporation Multi-sequence burst accessing for SDRAM
US6959355B2 (en) * 2003-02-24 2005-10-25 Standard Microsystems Corporation Universal serial bus hub with shared high speed handler
US7185126B2 (en) * 2003-02-24 2007-02-27 Standard Microsystems Corporation Universal serial bus hub with shared transaction translator memory
US6874042B2 (en) * 2003-03-11 2005-03-29 Dell Products L.P. System and method for using a switch to route peripheral and graphics data on an interconnect
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JP4500610B2 (ja) * 2004-07-07 2010-07-14 キヤノン株式会社 映像信号処理装置、メモリ制御方法、及びプログラム
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US7433990B2 (en) * 2006-01-24 2008-10-07 Standard Microsystems Corporation Transferring system information via universal serial bus (USB)
US7523243B2 (en) * 2006-04-14 2009-04-21 Standard Microsystems Corporation Multi-host USB device controller
US7480753B2 (en) * 2006-04-27 2009-01-20 Standard Microsystems Corporation Switching upstream and downstream logic between ports in a universal serial bus hub
US20080005262A1 (en) * 2006-06-16 2008-01-03 Henry Wurzburg Peripheral Sharing USB Hub for a Wireless Host
KR100888427B1 (ko) * 2006-09-15 2009-03-11 엠텍비젼 주식회사 공유 메모리를 구비한 디지털 처리 장치 및 데이터 출력방법
US7949815B2 (en) * 2006-09-27 2011-05-24 Intel Corporation Virtual heterogeneous channel for message passing
US20090063717A1 (en) * 2007-08-28 2009-03-05 Bohm Mark R Rate Adaptation for Support of Full-Speed USB Transactions Over a High-Speed USB Interface
US8180975B2 (en) * 2008-02-26 2012-05-15 Microsoft Corporation Controlling interference in shared memory systems using parallelism-aware batch scheduling
KR101283482B1 (ko) * 2009-12-11 2013-07-12 한국전자통신연구원 Ｐｃｉ 익스프레스 프로토콜 처리 장치
US8397006B2 (en) * 2010-01-28 2013-03-12 Freescale Semiconductor, Inc. Arbitration scheme for accessing a shared resource
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Also Published As

Publication number Publication date
TW358180B (en) 1999-05-11
KR20000022251A (ko) 2000-04-25
DE69724463D1 (de) 2003-10-02
DE69724463T2 (de) 2004-07-08
EP0972251B1 (en) 2003-08-27
JP2001523361A (ja) 2001-11-20
EP0972251A1 (en) 2000-01-19
KR100317517B1 (ko) 2002-02-19
US5815167A (en) 1998-09-29
JP3976342B2 (ja) 2007-09-19
EP0972251A4 (en) 2000-01-19
WO1997050042A1 (en) 1997-12-31

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