AU2003228900A1 - Efficient packet processing pipeline device and method - Google Patents

Efficient packet processing pipeline device and method

Info

Publication number
AU2003228900A1
AU2003228900A1 AU2003228900A AU2003228900A AU2003228900A1 AU 2003228900 A1 AU2003228900 A1 AU 2003228900A1 AU 2003228900 A AU2003228900 A AU 2003228900A AU 2003228900 A AU2003228900 A AU 2003228900A AU 2003228900 A1 AU2003228900 A1 AU 2003228900A1
Authority
AU
Australia
Prior art keywords
packet processing
processing pipeline
pipeline device
efficient packet
efficient
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003228900A
Other versions
AU2003228900A8 (en
Inventor
Luc De Coster
Koen Deforche
Geert Verbruggen
Johan Wouters
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Transwitch Corp
Original Assignee
Transwitch Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Transwitch Corp filed Critical Transwitch Corp
Publication of AU2003228900A1 publication Critical patent/AU2003228900A1/en
Publication of AU2003228900A8 publication Critical patent/AU2003228900A8/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3072—Packet splitting
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3063—Pipelined operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
AU2003228900A 2002-04-26 2003-04-25 Efficient packet processing pipeline device and method Abandoned AU2003228900A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GBGB0209670.9A GB0209670D0 (en) 2002-04-26 2002-04-26 Efficient packet processing pipelining device and method
GB0209670.9 2002-04-26
PCT/US2003/014259 WO2003091857A2 (en) 2002-04-26 2003-04-25 Efficient packet processing pipeline device and method

Publications (2)

Publication Number Publication Date
AU2003228900A1 true AU2003228900A1 (en) 2003-11-10
AU2003228900A8 AU2003228900A8 (en) 2003-11-10

Family

ID=9935632

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003228900A Abandoned AU2003228900A1 (en) 2002-04-26 2003-04-25 Efficient packet processing pipeline device and method

Country Status (5)

Country Link
EP (1) EP1523829A4 (en)
CN (1) CN100450050C (en)
AU (1) AU2003228900A1 (en)
GB (1) GB0209670D0 (en)
WO (1) WO2003091857A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012015388A1 (en) * 2010-07-26 2012-02-02 Hewlett-Packard Development Company, L. P. Mitigation of detected patterns in a network device
WO2018188738A1 (en) * 2017-04-11 2018-10-18 NEC Laboratories Europe GmbH Packet handling method and apparatus for network service functions
CN113364685B (en) * 2021-05-17 2023-03-14 中国人民解放军国防科技大学 Distributed MAC table item processing device and method

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0771111B2 (en) * 1985-09-13 1995-07-31 日本電気株式会社 Packet exchange processor
US4899333A (en) * 1988-03-31 1990-02-06 American Telephone And Telegraph Company At&T Bell Laboratories Architecture of the control of a high performance packet switching distribution network
US5341369A (en) * 1992-02-11 1994-08-23 Vitesse Semiconductor Corp. Multichannel self-routing packet switching network architecture
US6182210B1 (en) * 1997-12-16 2001-01-30 Intel Corporation Processor having multiple program counters and trace buffers outside an execution pipeline
US6286027B1 (en) * 1998-11-30 2001-09-04 Lucent Technologies Inc. Two step thread creation with register renaming
US6341347B1 (en) * 1999-05-11 2002-01-22 Sun Microsystems, Inc. Thread switch logic in a multiple-thread processor
US6625654B1 (en) * 1999-12-28 2003-09-23 Intel Corporation Thread signaling in multi-threaded network processor
WO2002005499A1 (en) * 2000-01-30 2002-01-17 Celox Networks, Inc. Device and method for packet formatting
US20020069402A1 (en) * 2000-10-05 2002-06-06 Nevill Edward Colles Scheduling control within a system having mixed hardware and software based instruction execution

Also Published As

Publication number Publication date
EP1523829A4 (en) 2007-12-19
GB0209670D0 (en) 2002-06-05
CN1663188A (en) 2005-08-31
EP1523829A2 (en) 2005-04-20
WO2003091857A2 (en) 2003-11-06
WO2003091857A9 (en) 2007-12-13
WO2003091857A3 (en) 2003-12-11
CN100450050C (en) 2009-01-07
AU2003228900A8 (en) 2003-11-10

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase