AU2002231232A1 - Branch handling for single instruction multiple datapath processor architectures - Google Patents

Branch handling for single instruction multiple datapath processor architectures

Info

Publication number
AU2002231232A1
AU2002231232A1 AU2002231232A AU3123202A AU2002231232A1 AU 2002231232 A1 AU2002231232 A1 AU 2002231232A1 AU 2002231232 A AU2002231232 A AU 2002231232A AU 3123202 A AU3123202 A AU 3123202A AU 2002231232 A1 AU2002231232 A1 AU 2002231232A1
Authority
AU
Australia
Prior art keywords
single instruction
instruction multiple
processor architectures
multiple datapath
branch handling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002231232A
Inventor
John L. Redford
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ChipWrights Design Inc
Original Assignee
ChipWrights Design Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ChipWrights Design Inc filed Critical ChipWrights Design Inc
Publication of AU2002231232A1 publication Critical patent/AU2002231232A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/45—Exploiting coarse grain parallelism in compilation, i.e. parallelism between groups of instructions
AU2002231232A 2000-11-28 2001-11-09 Branch handling for single instruction multiple datapath processor architectures Abandoned AU2002231232A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/724,196 2000-11-28
US09/724,196 US6931518B1 (en) 2000-11-28 2000-11-28 Branching around conditional processing if states of all single instruction multiple datapaths are disabled and the computer program is non-deterministic
PCT/US2001/049903 WO2002044895A1 (en) 2000-11-28 2001-11-09 Branch handling for single instruction multiple datapath processor architectures

Publications (1)

Publication Number Publication Date
AU2002231232A1 true AU2002231232A1 (en) 2002-06-11

Family

ID=24909432

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002231232A Abandoned AU2002231232A1 (en) 2000-11-28 2001-11-09 Branch handling for single instruction multiple datapath processor architectures

Country Status (7)

Country Link
US (1) US6931518B1 (en)
EP (1) EP1348160A1 (en)
CN (1) CN1486459A (en)
AU (1) AU2002231232A1 (en)
DE (1) DE01991508T1 (en)
TW (1) TW548588B (en)
WO (1) WO2002044895A1 (en)

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US20050114850A1 (en) 2003-10-29 2005-05-26 Saurabh Chheda Energy-focused re-compilation of executables and hardware mechanisms based on compiler-architecture interaction and compiler-inserted control
US7996671B2 (en) 2003-11-17 2011-08-09 Bluerisc Inc. Security of program executables and microprocessors based on compiler-architecture interaction
US8607209B2 (en) 2004-02-04 2013-12-10 Bluerisc Inc. Energy-focused compiler-assisted branch prediction
US8190809B2 (en) * 2004-11-23 2012-05-29 Efficient Memory Technology Shunted interleave for accessing plural memory banks, particularly those having partially accessed cells containing data for cache lines
CN101069211A (en) * 2004-11-23 2007-11-07 高效存储技术公司 Method and apparatus of multiple abbreviations of interleaved addressing of paged memories and intelligent memory banks therefor
US20080126766A1 (en) 2006-11-03 2008-05-29 Saurabh Chheda Securing microprocessors against information leakage and physical tampering
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CN108703996A (en) * 2018-08-23 2018-10-26 杨飞 It is a kind of to have effects that enhance the pure plant group liquid separation of memory

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Also Published As

Publication number Publication date
US6931518B1 (en) 2005-08-16
DE01991508T1 (en) 2004-04-22
WO2002044895A1 (en) 2002-06-06
EP1348160A1 (en) 2003-10-01
TW548588B (en) 2003-08-21
WO2002044895A9 (en) 2003-04-17
CN1486459A (en) 2004-03-31

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