AU2001289032A1 - Method and apparatus for encoding of linear block codes - Google Patents

Method and apparatus for encoding of linear block codes

Info

Publication number
AU2001289032A1
AU2001289032A1 AU2001289032A AU8903201A AU2001289032A1 AU 2001289032 A1 AU2001289032 A1 AU 2001289032A1 AU 2001289032 A AU2001289032 A AU 2001289032A AU 8903201 A AU8903201 A AU 8903201A AU 2001289032 A1 AU2001289032 A1 AU 2001289032A1
Authority
AU
Australia
Prior art keywords
bits
responses
zero
string
encoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001289032A
Other languages
English (en)
Inventor
James Y. Hurt
Jeffrey A Levin
Nikolai Schlegel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of AU2001289032A1 publication Critical patent/AU2001289032A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H03M13/095—Error detection codes other than CRC and single parity bit codes
    • H03M13/096—Checksums
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/47—Error detection, forward error correction or error protection, not provided for in groups H03M13/01 - H03M13/37
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Algebra (AREA)
  • Error Detection And Correction (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
AU2001289032A 2000-09-26 2001-09-14 Method and apparatus for encoding of linear block codes Abandoned AU2001289032A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/671,372 US6763492B1 (en) 2000-09-26 2000-09-26 Method and apparatus for encoding of linear block codes
US09671372 2000-09-26
PCT/US2001/028496 WO2002027939A2 (en) 2000-09-26 2001-09-14 Method and apparatus for encoding of linear block codes

Publications (1)

Publication Number Publication Date
AU2001289032A1 true AU2001289032A1 (en) 2002-04-08

Family

ID=24694257

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001289032A Abandoned AU2001289032A1 (en) 2000-09-26 2001-09-14 Method and apparatus for encoding of linear block codes

Country Status (15)

Country Link
US (1) US6763492B1 (xx)
EP (2) EP1323235A2 (xx)
JP (1) JP2004510380A (xx)
KR (1) KR100894234B1 (xx)
CN (2) CN101083468A (xx)
AU (1) AU2001289032A1 (xx)
BR (1) BR0114169A (xx)
CA (1) CA2423425A1 (xx)
HK (1) HK1061121A1 (xx)
IL (1) IL154898A0 (xx)
MX (1) MXPA03002622A (xx)
NO (1) NO20031352L (xx)
RU (1) RU2003112223A (xx)
TW (1) TW531973B (xx)
WO (1) WO2002027939A2 (xx)

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US6904558B2 (en) * 2002-02-22 2005-06-07 Agilent Technologies, Inc. Methods for computing the CRC of a message from the incremental CRCs of composite sub-messages
US7458006B2 (en) * 2002-02-22 2008-11-25 Avago Technologies General Ip (Singapore) Pte. Ltd. Methods for computing the CRC of a message from the incremental CRCs of composite sub-messages
WO2003090362A1 (fr) * 2002-04-22 2003-10-30 Fujitsu Limited Codeur et decodeur de detection d'erreur, et diviseur
US20050219975A1 (en) * 2002-06-28 2005-10-06 Koninklijke Philips Electronics N.V. Method and arrangement for the generation of an identification data block
US7360142B1 (en) 2004-03-03 2008-04-15 Marvell Semiconductor Israel Ltd. Methods, architectures, circuits, software and systems for CRC determination
US7434150B1 (en) * 2004-03-03 2008-10-07 Marvell Israel (M.I.S.L.) Ltd. Methods, circuits, architectures, software and systems for determining a data transmission error and/or checking or confirming such error determinations
JP2006060663A (ja) * 2004-08-23 2006-03-02 Oki Electric Ind Co Ltd 巡回符号回路
SE0403218D0 (sv) * 2004-12-30 2004-12-30 Ericsson Telefon Ab L M Method and apparatus relating to communication-
DE102005018248B4 (de) * 2005-04-19 2014-06-12 Deutsche Gesetzliche Unfallversicherung E.V. (Dguv) Prüfverfahren zur sicheren, beschleunigten Erkennung von Datenfehlern und Vorrichtung zur Durchführung des Prüfverfahrens
US7500174B2 (en) 2005-05-23 2009-03-03 Microsoft Corporation Encoding and application of extended hamming checksum
KR100850787B1 (ko) * 2006-12-08 2008-08-06 한국전자통신연구원 상위 인터페이스 메모리를 이용한 시공간 블록 코드 방식의인코딩 장치 및 그 방법
US8103934B2 (en) 2007-12-21 2012-01-24 Honeywell International Inc. High speed memory error detection and correction using interleaved (8,4) LBCs
US9003259B2 (en) * 2008-11-26 2015-04-07 Red Hat, Inc. Interleaved parallel redundancy check calculation for memory devices
WO2013104116A1 (zh) * 2012-01-11 2013-07-18 深圳市华奥通通信技术有限公司 一种无线通信系统及方法
CN107302420B (zh) * 2017-06-20 2019-11-08 北京科技大学 一种线性网络编码方法
CN111146986B (zh) * 2019-12-30 2022-08-12 深圳市越疆科技有限公司 磁编码器的位置定位方法、装置、电子设备及计算机可读存储介质

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Publication number Priority date Publication date Assignee Title
US4623999A (en) * 1984-06-04 1986-11-18 E-Systems, Inc. Look-up table encoder for linear block codes
JPH03272224A (ja) * 1990-03-20 1991-12-03 Canon Inc 情報信号処理方法
EP0470451A3 (en) 1990-08-07 1993-01-20 National Semiconductor Corporation Implementation of the high-level data link control cyclic redundancy check (hdlc crc) calculation
CA2129236C (en) 1992-12-29 1998-12-22 Shiping Li Efficient crc remainder coefficient generation and checking device and method
DE69320321T2 (de) 1993-02-05 1998-12-24 Hewlett-Packard Co., Palo Alto, Calif. Verfahren und Gerät zum Nachprüfen von CRC-Koden, wobei CRC Teilkode kombiniert werden
US5491700A (en) * 1993-10-01 1996-02-13 Pacific Communication Sciences, Inc. Method and apparatus for code error correction using an ordered syndrome and error correction lookup table
JPH07264078A (ja) * 1994-03-23 1995-10-13 Kokusai Electric Co Ltd Ｂｃｈ符号化装置及びｂｃｈ符号化方法
US5703887A (en) * 1994-12-23 1997-12-30 General Instrument Corporation Of Delaware Synchronization and error detection in a packetized data stream
US6308295B1 (en) * 1996-10-08 2001-10-23 Arizona Board Of Regents Parallel spectral reed-solomon encoder and decoder
JPH10135847A (ja) * 1996-10-25 1998-05-22 Nec Corp Ａｔｍ通信装置の並列型ヘッダ誤り訂正回路およびヘッダ誤り訂正方法
US5978956A (en) * 1997-12-03 1999-11-02 Quantum Corporation Five-error correction system
US6195780B1 (en) * 1997-12-10 2001-02-27 Lucent Technologies Inc. Method and apparatus for generating cyclical redundancy code
US6029186A (en) 1998-01-20 2000-02-22 3Com Corporation High speed calculation of cyclical redundancy check sums
US6263470B1 (en) * 1998-02-03 2001-07-17 Texas Instruments Incorporated Efficient look-up table methods for Reed-Solomon decoding
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US6360348B1 (en) * 1999-08-27 2002-03-19 Motorola, Inc. Method and apparatus for coding and decoding data
JP2003523682A (ja) * 2000-02-17 2003-08-05 アナログ デバイス インコーポレーテッド Ｃｒｃ、および他の剰余を基本とする符号の生成に用いる方法、装置、製品
CN1112778C (zh) * 2000-08-08 2003-06-25 深圳市中兴通讯股份有限公司 一种数字通信系统中的信道循环冗余码校验的方法

Also Published As

Publication number Publication date
CN1476675A (zh) 2004-02-18
BR0114169A (pt) 2003-12-09
JP2004510380A (ja) 2004-04-02
CA2423425A1 (en) 2002-04-04
MXPA03002622A (es) 2004-05-24
KR20030036826A (ko) 2003-05-09
WO2002027939A2 (en) 2002-04-04
HK1061121A1 (en) 2004-09-03
CN1333530C (zh) 2007-08-22
KR100894234B1 (ko) 2009-04-20
EP2209215A1 (en) 2010-07-21
IL154898A0 (en) 2003-10-31
EP1323235A2 (en) 2003-07-02
US6763492B1 (en) 2004-07-13
NO20031352L (no) 2003-05-08
CN101083468A (zh) 2007-12-05
WO2002027939A3 (en) 2002-05-30
NO20031352D0 (no) 2003-03-25
TW531973B (en) 2003-05-11
RU2003112223A (ru) 2004-08-27

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Legal Events

Date Code Title Description
MK4 Application lapsed section 142(2)(d) - no continuation fee paid for the application