AU2001266657A1 - Non-volatile cache integrated with mass storage device - Google Patents

Non-volatile cache integrated with mass storage device

Info

Publication number
AU2001266657A1
AU2001266657A1 AU2001266657A AU6665701A AU2001266657A1 AU 2001266657 A1 AU2001266657 A1 AU 2001266657A1 AU 2001266657 A AU2001266657 A AU 2001266657A AU 6665701 A AU6665701 A AU 6665701A AU 2001266657 A1 AU2001266657 A1 AU 2001266657A1
Authority
AU
Australia
Prior art keywords
storage device
mass storage
volatile cache
cache integrated
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001266657A
Other languages
English (en)
Inventor
Richard Coulson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of AU2001266657A1 publication Critical patent/AU2001266657A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/21—Employing a record carrier using a specific recording technology
    • G06F2212/214—Solid state disk
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/31—Providing disk cache in a specific location of a storage system
    • G06F2212/313—In storage device

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
AU2001266657A 2000-06-23 2001-06-01 Non-volatile cache integrated with mass storage device Abandoned AU2001266657A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US60201100A 2000-06-23 2000-06-23
US09602011 2000-06-23
PCT/US2001/017845 WO2002001364A2 (en) 2000-06-23 2001-06-01 Non-volatile cache integrated with mass storage device

Publications (1)

Publication Number Publication Date
AU2001266657A1 true AU2001266657A1 (en) 2002-01-08

Family

ID=24409616

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001266657A Abandoned AU2001266657A1 (en) 2000-06-23 2001-06-01 Non-volatile cache integrated with mass storage device

Country Status (7)

Country Link
JP (1) JP2004502237A (enExample)
CN (1) CN1465009A (enExample)
AU (1) AU2001266657A1 (enExample)
DE (1) DE10196383T1 (enExample)
GB (1) GB2380031B (enExample)
TW (1) TW576966B (enExample)
WO (1) WO2002001364A2 (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7275135B2 (en) 2001-08-31 2007-09-25 Intel Corporation Hardware updated metadata for non-volatile mass storage cache
US7103724B2 (en) 2002-04-01 2006-09-05 Intel Corporation Method and apparatus to generate cache data
JP4327585B2 (ja) * 2003-12-25 2009-09-09 株式会社東芝 記憶装置
US7173863B2 (en) * 2004-03-08 2007-02-06 Sandisk Corporation Flash controller cache architecture
US7136973B2 (en) * 2004-02-04 2006-11-14 Sandisk Corporation Dual media storage device
EP3001321B1 (en) 2004-02-05 2018-07-11 BlackBerry Limited Memory controller interface
US7644239B2 (en) 2004-05-03 2010-01-05 Microsoft Corporation Non-volatile memory cache performance improvement
JP4131862B2 (ja) * 2004-07-01 2008-08-13 Ｄｔｓ株式会社 ３．５インチ定形型ディスク形状を持ったデータトランスミッション装置
US7490197B2 (en) 2004-10-21 2009-02-10 Microsoft Corporation Using external memory devices to improve system performance
JP2006155434A (ja) * 2004-12-01 2006-06-15 Nec Engineering Ltd Ｐｃｉバスコントローラ及びその動作制御方法並びにプログラム
US8914557B2 (en) 2005-12-16 2014-12-16 Microsoft Corporation Optimizing write and wear performance for a memory
EP2041664A1 (en) * 2006-07-05 2009-04-01 Agere Systems, Inc. Systems and methods for multiport communication distribution
US8762636B2 (en) 2006-12-14 2014-06-24 Emc Corporation Data storage system having a global cache memory distributed among non-volatile memories within system disk drives
US8631203B2 (en) 2007-12-10 2014-01-14 Microsoft Corporation Management of external memory functioning as virtual cache
FR2924836B1 (fr) * 2007-12-11 2010-12-24 Commissariat Energie Atomique Dispositif de service de fiabilite, systeme et procede electroniques mettant en oeuvre au moins un tel dispositif et produit de programme informatique permettant de mettre en oeuvre un tel procede.
US9032151B2 (en) 2008-09-15 2015-05-12 Microsoft Technology Licensing, Llc Method and system for ensuring reliability of cache data and metadata subsequent to a reboot
US8032707B2 (en) 2008-09-15 2011-10-04 Microsoft Corporation Managing cache data and metadata
US7953774B2 (en) 2008-09-19 2011-05-31 Microsoft Corporation Aggregation of write traffic to a data store
JP4972064B2 (ja) * 2008-09-25 2012-07-11 シャープ株式会社 光ディスク駆動制御装置
CN102521147B (zh) * 2011-11-17 2015-03-25 曙光信息产业(北京)有限公司 一种使用高速非易失介质做缓存的管理方法
JP5803614B2 (ja) 2011-11-29 2015-11-04 ソニー株式会社 不揮発性キャッシュメモリ、不揮発性キャッシュメモリの処理方法、コンピュータシステム
US9842128B2 (en) * 2013-08-01 2017-12-12 Sandisk Technologies Llc Systems and methods for atomic storage operations
US10642771B2 (en) 2015-05-22 2020-05-05 Hewlett-Packard Development Company, L.P. Data channel allocation

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5594885A (en) * 1991-03-05 1997-01-14 Zitel Corporation Method for operating a cache memory system using a recycled register for identifying a reuse status of a corresponding cache entry
JPH06236241A (ja) * 1993-02-09 1994-08-23 Sharp Corp フラッシュメモリを用いたハードディスク装置
JPH0883148A (ja) * 1994-09-13 1996-03-26 Nec Corp 磁気ディスク装置

Also Published As

Publication number Publication date
GB2380031A (en) 2003-03-26
GB0228874D0 (en) 2003-01-15
TW576966B (en) 2004-02-21
JP2004502237A (ja) 2004-01-22
GB2380031B (en) 2004-09-29
WO2002001364A2 (en) 2002-01-03
DE10196383T1 (de) 2003-07-03
WO2002001364A3 (en) 2002-04-04
CN1465009A (zh) 2003-12-31

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