AU2001258505A1 - Thin layer chip insulation for conductive polymer connection - Google Patents

Thin layer chip insulation for conductive polymer connection

Info

Publication number
AU2001258505A1
AU2001258505A1 AU2001258505A AU5850501A AU2001258505A1 AU 2001258505 A1 AU2001258505 A1 AU 2001258505A1 AU 2001258505 A AU2001258505 A AU 2001258505A AU 5850501 A AU5850501 A AU 5850501A AU 2001258505 A1 AU2001258505 A1 AU 2001258505A1
Authority
AU
Australia
Prior art keywords
thin layer
conductive polymer
layer chip
polymer connection
chip insulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001258505A
Inventor
Philippe Patrice
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Gemplus SA
Original Assignee
Gemplus Card International SA
Gemplus SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gemplus Card International SA, Gemplus SA filed Critical Gemplus Card International SA
Publication of AU2001258505A1 publication Critical patent/AU2001258505A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3171Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
AU2001258505A 2000-05-10 2001-05-07 Thin layer chip insulation for conductive polymer connection Abandoned AU2001258505A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR0005959A FR2808920B1 (en) 2000-05-10 2000-05-10 INTEGRATED CIRCUIT CHIP PROTECTION METHOD
FR0005959 2000-05-10
PCT/FR2001/001384 WO2001086719A1 (en) 2000-05-10 2001-05-07 Thin layer chip insulation for conductive polymer connection

Publications (1)

Publication Number Publication Date
AU2001258505A1 true AU2001258505A1 (en) 2001-11-20

Family

ID=8850067

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001258505A Abandoned AU2001258505A1 (en) 2000-05-10 2001-05-07 Thin layer chip insulation for conductive polymer connection

Country Status (3)

Country Link
AU (1) AU2001258505A1 (en)
FR (1) FR2808920B1 (en)
WO (1) WO2001086719A1 (en)

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2348323A1 (en) * 1973-09-26 1975-04-03 Licentia Gmbh Multi-component semiconductor integrated cct. - has metal terminal contacts on mesa edge of individual ccts.
JPS5272572A (en) * 1975-12-15 1977-06-17 Seiko Epson Corp Semiconductor device
JPS60165779A (en) * 1984-02-07 1985-08-28 Rohm Co Ltd Manufacture of chip of semiconductor laser
JPS6116592A (en) * 1984-07-02 1986-01-24 Rohm Co Ltd Manufacture of chip of semiconductor laser
JPS61172361A (en) * 1985-01-28 1986-08-04 Shindo Denshi Kogyo Kk Manufacture of tape carrier
JPH0529379A (en) * 1991-07-25 1993-02-05 Mitsubishi Electric Corp Semiconductor device and fabrication thereof
US5646439A (en) * 1992-05-13 1997-07-08 Matsushita Electric Industrial Co., Ltd. Electronic chip component with passivation film and organic protective film
US5693565A (en) * 1996-07-15 1997-12-02 Dow Corning Corporation Semiconductor chips suitable for known good die testing
FR2761498B1 (en) * 1997-03-27 1999-06-18 Gemplus Card Int ELECTRONIC MODULE AND ITS MANUFACTURING PROCESS AND CHIP CARD INCLUDING SUCH A MODULE

Also Published As

Publication number Publication date
FR2808920A1 (en) 2001-11-16
FR2808920B1 (en) 2003-10-03
WO2001086719A1 (en) 2001-11-15

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