ATE551652T1 - Dynamische adressenübersetzung mit übersetzungsausnahmenqualifikation - Google Patents
Dynamische adressenübersetzung mit übersetzungsausnahmenqualifikationInfo
- Publication number
- ATE551652T1 ATE551652T1 AT09714687T AT09714687T ATE551652T1 AT E551652 T1 ATE551652 T1 AT E551652T1 AT 09714687 T AT09714687 T AT 09714687T AT 09714687 T AT09714687 T AT 09714687T AT E551652 T1 ATE551652 T1 AT E551652T1
- Authority
- AT
- Austria
- Prior art keywords
- translation
- address
- exception
- host
- guest
- Prior art date
Links
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1009—Address translation using page tables, e.g. page table structures
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/0284—Multiple user address space allocation, e.g. using different base addresses
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/109—Address translation for multiple virtual address spaces, e.g. segmentation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0662—Virtualisation aspects
- G06F3/0667—Virtualisation aspects at data level, e.g. file, record or object virtualisation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/067—Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/15—Use in a specific computing environment
- G06F2212/152—Virtualized environment, e.g. logically partitioned system
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/50—Control mechanisms for virtual memory, cache or TLB
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/65—Details of virtual memory and virtual address translation
- G06F2212/652—Page size control
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/65—Details of virtual memory and virtual address translation
- G06F2212/657—Virtual address space management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Software Systems (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Devices For Executing Special Programs (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/037,268 US8095773B2 (en) | 2008-02-26 | 2008-02-26 | Dynamic address translation with translation exception qualifier |
PCT/EP2009/051864 WO2009106457A1 (en) | 2008-02-26 | 2009-02-17 | Dynamic address translation with translation exception qualifier |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE551652T1 true ATE551652T1 (de) | 2012-04-15 |
Family
ID=40626591
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT09714687T ATE551652T1 (de) | 2008-02-26 | 2009-02-17 | Dynamische adressenübersetzung mit übersetzungsausnahmenqualifikation |
Country Status (13)
Country | Link |
---|---|
US (6) | US8095773B2 (de) |
EP (1) | EP2248025B1 (de) |
JP (1) | JP5079104B2 (de) |
KR (1) | KR101174583B1 (de) |
CN (1) | CN101960432B (de) |
AT (1) | ATE551652T1 (de) |
CY (1) | CY1112693T1 (de) |
DK (1) | DK2248025T3 (de) |
ES (1) | ES2381432T3 (de) |
PL (1) | PL2248025T3 (de) |
PT (1) | PT2248025E (de) |
SI (1) | SI2248025T1 (de) |
WO (1) | WO2009106457A1 (de) |
Families Citing this family (49)
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US8117417B2 (en) | 2008-01-11 | 2012-02-14 | International Business Machines Corporation | Dynamic address translation with change record override |
US8103851B2 (en) | 2008-01-11 | 2012-01-24 | International Business Machines Corporation | Dynamic address translation with translation table entry format control for indentifying format of the translation table entry |
US8417916B2 (en) * | 2008-01-11 | 2013-04-09 | International Business Machines Corporation | Perform frame management function instruction for setting storage keys and clearing blocks of main storage |
US8151083B2 (en) * | 2008-01-11 | 2012-04-03 | International Business Machines Corporation | Dynamic address translation with frame management |
US8082405B2 (en) * | 2008-01-11 | 2011-12-20 | International Business Machines Corporation | Dynamic address translation with fetch protection |
US8019964B2 (en) * | 2008-01-11 | 2011-09-13 | International Buisness Machines Corporation | Dynamic address translation with DAT protection |
US8041922B2 (en) * | 2008-01-11 | 2011-10-18 | International Business Machines Corporation | Enhanced dynamic address translation with load real address function |
US8041923B2 (en) | 2008-01-11 | 2011-10-18 | International Business Machines Corporation | Load page table entry address instruction execution based on an address translation format control field |
US8037278B2 (en) * | 2008-01-11 | 2011-10-11 | International Business Machines Corporation | Dynamic address translation with format control |
US8677098B2 (en) | 2008-01-11 | 2014-03-18 | International Business Machines Corporation | Dynamic address translation with fetch protection |
US8335906B2 (en) * | 2008-01-11 | 2012-12-18 | International Business Machines Corporation | Perform frame management function instruction for clearing blocks of main storage |
US8176280B2 (en) | 2008-02-25 | 2012-05-08 | International Business Machines Corporation | Use of test protection instruction in computing environments that support pageable guests |
US8086811B2 (en) | 2008-02-25 | 2011-12-27 | International Business Machines Corporation | Optimizations of a perform frame management function issued by pageable guests |
US8095773B2 (en) | 2008-02-26 | 2012-01-10 | International Business Machines Corporation | Dynamic address translation with translation exception qualifier |
US10248453B2 (en) * | 2012-10-23 | 2019-04-02 | Red Hat Israel, Ltd. | Client live migration for a virtual machine |
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US9652376B2 (en) | 2013-01-28 | 2017-05-16 | Radian Memory Systems, Inc. | Cooperative flash memory control |
US9582295B2 (en) | 2014-03-18 | 2017-02-28 | International Business Machines Corporation | Architectural mode configuration |
US9916185B2 (en) | 2014-03-18 | 2018-03-13 | International Business Machines Corporation | Managing processing associated with selected architectural facilities |
US20160062911A1 (en) * | 2014-08-27 | 2016-03-03 | Advanced Micro Devices, Inc. | Routing direct memory access requests in a virtualized computing environment |
US9542118B1 (en) * | 2014-09-09 | 2017-01-10 | Radian Memory Systems, Inc. | Expositive flash memory control |
EP3274824B1 (de) | 2015-03-27 | 2021-03-17 | Intel Corporation | Effiziente adressenübersetzung |
JP6559793B2 (ja) * | 2015-04-10 | 2019-08-14 | グーグル エルエルシー | 共有オブジェクト・レベルにおけるバイナリ変換 |
DE112015006438T5 (de) * | 2015-04-10 | 2018-01-04 | Google Inc. | Binäre Übersetzung in nativen Client |
JP6441171B2 (ja) * | 2015-06-12 | 2018-12-19 | 東芝メモリ株式会社 | メモリシステム |
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US9424155B1 (en) | 2016-01-27 | 2016-08-23 | International Business Machines Corporation | Use efficiency of platform memory resources through firmware managed I/O translation table paging |
US11150928B2 (en) * | 2016-06-08 | 2021-10-19 | Red Hat Israel, Ltd. | Hypervisor translation bypass |
US10169243B2 (en) | 2016-07-18 | 2019-01-01 | International Business Machines Corporation | Reducing over-purging of structures associated with address translation |
US10282305B2 (en) | 2016-07-18 | 2019-05-07 | International Business Machines Corporation | Selective purging of entries of structures associated with address translation in a virtualized environment |
US10162764B2 (en) | 2016-07-18 | 2018-12-25 | International Business Machines Corporation | Marking page table/page status table entries to indicate memory used to back address translation structures |
US10802986B2 (en) | 2016-07-18 | 2020-10-13 | International Business Machines Corporation | Marking to indicate memory used to back address translation structures |
US10180909B2 (en) | 2016-07-18 | 2019-01-15 | International Business Machines Corporation | Host-based resetting of active use of guest page table indicators |
US10168902B2 (en) | 2016-07-18 | 2019-01-01 | International Business Machines Corporation | Reducing purging of structures associated with address translation |
US10176111B2 (en) | 2016-07-18 | 2019-01-08 | International Business Machines Corporation | Host page management using active guest page table indicators |
US10176006B2 (en) | 2016-07-18 | 2019-01-08 | International Business Machines Corporation | Delaying purging of structures associated with address translation |
US10176110B2 (en) | 2016-07-18 | 2019-01-08 | International Business Machines Corporation | Marking storage keys to indicate memory used to back address translation structures |
US10248573B2 (en) | 2016-07-18 | 2019-04-02 | International Business Machines Corporation | Managing memory used to back address translation structures |
US10241924B2 (en) | 2016-07-18 | 2019-03-26 | International Business Machines Corporation | Reducing over-purging of structures associated with address translation using an array of tags |
US10223281B2 (en) | 2016-07-18 | 2019-03-05 | International Business Machines Corporation | Increasing the scope of local purges of structures associated with address translation |
US9798597B1 (en) | 2016-09-26 | 2017-10-24 | International Business Machines Corporation | Verifying selective purging of entries from translation look-aside buffers |
CN113810419B (zh) * | 2016-11-09 | 2023-09-19 | 联发科技股份有限公司 | 增强多媒体呼叫控制的方法及其基站和用户设备 |
US10831664B2 (en) | 2017-06-16 | 2020-11-10 | International Business Machines Corporation | Cache structure using a logical directory |
US10606762B2 (en) | 2017-06-16 | 2020-03-31 | International Business Machines Corporation | Sharing virtual and real translations in a virtual cache |
US10698836B2 (en) | 2017-06-16 | 2020-06-30 | International Business Machines Corporation | Translation support for a virtual cache |
US11469953B2 (en) | 2017-09-27 | 2022-10-11 | Intel Corporation | Interworking of legacy appliances in virtualized networks |
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US8103851B2 (en) | 2008-01-11 | 2012-01-24 | International Business Machines Corporation | Dynamic address translation with translation table entry format control for indentifying format of the translation table entry |
US8037278B2 (en) | 2008-01-11 | 2011-10-11 | International Business Machines Corporation | Dynamic address translation with format control |
US8117417B2 (en) | 2008-01-11 | 2012-02-14 | International Business Machines Corporation | Dynamic address translation with change record override |
US8082405B2 (en) | 2008-01-11 | 2011-12-20 | International Business Machines Corporation | Dynamic address translation with fetch protection |
US8151083B2 (en) | 2008-01-11 | 2012-04-03 | International Business Machines Corporation | Dynamic address translation with frame management |
US8019964B2 (en) | 2008-01-11 | 2011-09-13 | International Buisness Machines Corporation | Dynamic address translation with DAT protection |
US8041922B2 (en) | 2008-01-11 | 2011-10-18 | International Business Machines Corporation | Enhanced dynamic address translation with load real address function |
US8677098B2 (en) | 2008-01-11 | 2014-03-18 | International Business Machines Corporation | Dynamic address translation with fetch protection |
US8417916B2 (en) | 2008-01-11 | 2013-04-09 | International Business Machines Corporation | Perform frame management function instruction for setting storage keys and clearing blocks of main storage |
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US8095773B2 (en) | 2008-02-26 | 2012-01-10 | International Business Machines Corporation | Dynamic address translation with translation exception qualifier |
-
2008
- 2008-02-26 US US12/037,268 patent/US8095773B2/en active Active
-
2009
- 2009-02-17 EP EP09714687A patent/EP2248025B1/de active Active
- 2009-02-17 WO PCT/EP2009/051864 patent/WO2009106457A1/en active Application Filing
- 2009-02-17 AT AT09714687T patent/ATE551652T1/de active
- 2009-02-17 ES ES09714687T patent/ES2381432T3/es active Active
- 2009-02-17 JP JP2010547162A patent/JP5079104B2/ja active Active
- 2009-02-17 DK DK09714687.2T patent/DK2248025T3/da active
- 2009-02-17 KR KR1020107017234A patent/KR101174583B1/ko active IP Right Grant
- 2009-02-17 SI SI200930238T patent/SI2248025T1/sl unknown
- 2009-02-17 PT PT09714687T patent/PT2248025E/pt unknown
- 2009-02-17 PL PL09714687T patent/PL2248025T3/pl unknown
- 2009-02-17 CN CN200980106284XA patent/CN101960432B/zh active Active
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2011
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2012
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KR20100126286A (ko) | 2010-12-01 |
KR101174583B1 (ko) | 2012-08-16 |
US20140181360A1 (en) | 2014-06-26 |
CY1112693T1 (el) | 2016-02-10 |
US20150339226A1 (en) | 2015-11-26 |
CN101960432B (zh) | 2012-10-10 |
US20180081800A9 (en) | 2018-03-22 |
PT2248025E (pt) | 2012-05-10 |
US20090216992A1 (en) | 2009-08-27 |
JP5079104B2 (ja) | 2012-11-21 |
ES2381432T3 (es) | 2012-05-28 |
ES2381432T8 (es) | 2012-06-27 |
US9092351B2 (en) | 2015-07-28 |
DK2248025T3 (da) | 2012-05-07 |
PL2248025T3 (pl) | 2012-11-30 |
US20190213126A1 (en) | 2019-07-11 |
US11074180B2 (en) | 2021-07-27 |
US20120084488A1 (en) | 2012-04-05 |
US8095773B2 (en) | 2012-01-10 |
WO2009106457A1 (en) | 2009-09-03 |
US10078585B2 (en) | 2018-09-18 |
US8683176B2 (en) | 2014-03-25 |
US20170315910A1 (en) | 2017-11-02 |
EP2248025A1 (de) | 2010-11-10 |
EP2248025B1 (de) | 2012-03-28 |
CN101960432A (zh) | 2011-01-26 |
US10241910B2 (en) | 2019-03-26 |
SI2248025T1 (sl) | 2012-05-31 |
JP2011513808A (ja) | 2011-04-28 |
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