ATE521940T1 - Schaltung und verfahren zur verbindung von bussystemen - Google Patents

Schaltung und verfahren zur verbindung von bussystemen

Info

Publication number
ATE521940T1
ATE521940T1 AT01129255T AT01129255T ATE521940T1 AT E521940 T1 ATE521940 T1 AT E521940T1 AT 01129255 T AT01129255 T AT 01129255T AT 01129255 T AT01129255 T AT 01129255T AT E521940 T1 ATE521940 T1 AT E521940T1
Authority
AT
Austria
Prior art keywords
card
backplane
signal
capacitance associated
circuit
Prior art date
Application number
AT01129255T
Other languages
English (en)
Inventor
Robert L Reay
John H Ziegler
Original Assignee
Linear Techn Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Linear Techn Inc filed Critical Linear Techn Inc
Application granted granted Critical
Publication of ATE521940T1 publication Critical patent/ATE521940T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4081—Live connection to bus, e.g. hot-plugging

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
  • Bus Control (AREA)
AT01129255T 2000-12-11 2001-12-11 Schaltung und verfahren zur verbindung von bussystemen ATE521940T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US25482100P 2000-12-11 2000-12-11

Publications (1)

Publication Number Publication Date
ATE521940T1 true ATE521940T1 (de) 2011-09-15

Family

ID=22965709

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01129255T ATE521940T1 (de) 2000-12-11 2001-12-11 Schaltung und verfahren zur verbindung von bussystemen

Country Status (3)

Country Link
US (2) US7032051B2 (de)
EP (4) EP1213655B1 (de)
AT (1) ATE521940T1 (de)

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US8487639B1 (en) 2008-11-21 2013-07-16 Cypress Semiconductor Corporation Receive demodulator for capacitive sensing
US8866500B2 (en) 2009-03-26 2014-10-21 Cypress Semiconductor Corporation Multi-functional capacitance sensing circuit with a current conveyor
US8723827B2 (en) 2009-07-28 2014-05-13 Cypress Semiconductor Corporation Predictive touch surface scanning
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US9268441B2 (en) 2011-04-05 2016-02-23 Parade Technologies, Ltd. Active integrator for a capacitive sense array
US8812760B1 (en) * 2011-12-22 2014-08-19 Cisco Technology, Inc. System and method for monitoring two-wire communication in a network environment
US8909844B2 (en) * 2012-07-04 2014-12-09 Lenovo Enterprise Solutions (Singapore) Pte. Ltd. Inter-integrated circuit (I2C) multiplexer switching as a function of clock frequency
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Also Published As

Publication number Publication date
EP2056208B1 (de) 2014-04-23
EP2060978B1 (de) 2013-02-13
EP2056208A1 (de) 2009-05-06
US7032051B2 (en) 2006-04-18
EP1213655A2 (de) 2002-06-12
US20020091887A1 (en) 2002-07-11
US20060212634A1 (en) 2006-09-21
EP1213655B1 (de) 2011-08-24
EP2056209B1 (de) 2013-02-13
EP2060978A1 (de) 2009-05-20
EP2056209A1 (de) 2009-05-06
EP1213655A3 (de) 2003-03-26

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