ATE459101T1 - Verfahren zum ablösen einer dünnen halbleiterschaltung von ihrer basis - Google Patents

Verfahren zum ablösen einer dünnen halbleiterschaltung von ihrer basis

Info

Publication number
ATE459101T1
ATE459101T1 AT05773837T AT05773837T ATE459101T1 AT E459101 T1 ATE459101 T1 AT E459101T1 AT 05773837 T AT05773837 T AT 05773837T AT 05773837 T AT05773837 T AT 05773837T AT E459101 T1 ATE459101 T1 AT E459101T1
Authority
AT
Austria
Prior art keywords
semiconductor circuit
base
thin semiconductor
separating
support substrate
Prior art date
Application number
AT05773837T
Other languages
English (en)
Inventor
Andreas Gakis
Wolfgang Schnitt
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE459101T1 publication Critical patent/ATE459101T1/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68359Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
AT05773837T 2004-08-20 2005-08-09 Verfahren zum ablösen einer dünnen halbleiterschaltung von ihrer basis ATE459101T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP04104002 2004-08-20
PCT/IB2005/052635 WO2006018787A2 (en) 2004-08-20 2005-08-09 Method of detaching a thin semiconductor circuit from its base

Publications (1)

Publication Number Publication Date
ATE459101T1 true ATE459101T1 (de) 2010-03-15

Family

ID=35559365

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05773837T ATE459101T1 (de) 2004-08-20 2005-08-09 Verfahren zum ablösen einer dünnen halbleiterschaltung von ihrer basis

Country Status (7)

Country Link
US (1) US8338228B2 (de)
EP (1) EP1782462B1 (de)
JP (1) JP2008511051A (de)
CN (1) CN101044610A (de)
AT (1) ATE459101T1 (de)
DE (1) DE602005019581D1 (de)
WO (1) WO2006018787A2 (de)

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3116085B2 (ja) 1997-09-16 2000-12-11 東京農工大学長 半導体素子形成法
US6036809A (en) 1999-02-16 2000-03-14 International Business Machines Corporation Process for releasing a thin-film structure from a substrate
JP2001185519A (ja) * 1999-12-24 2001-07-06 Hitachi Ltd 半導体装置及びその製造方法
US6444560B1 (en) * 2000-09-26 2002-09-03 International Business Machines Corporation Process for making fine pitch connections between devices and structure made by the process
US6946314B2 (en) * 2001-01-02 2005-09-20 The Charles Stark Draper Laboratory, Inc. Method for microfabricating structures using silicon-on-insulator material
DE10122324A1 (de) * 2001-05-08 2002-11-14 Philips Corp Intellectual Pty Flexible integrierte monolithische Schaltung
US6797537B2 (en) * 2001-10-30 2004-09-28 Irvine Sensors Corporation Method of making stackable layers containing encapsulated integrated circuit chips with one or more overlaying interconnect layers
TWI229435B (en) 2002-06-18 2005-03-11 Sanyo Electric Co Manufacture of semiconductor device
WO2004059720A1 (en) * 2002-12-20 2004-07-15 International Business Machines Corporation Three-dimensional device fabrication method

Also Published As

Publication number Publication date
EP1782462B1 (de) 2010-02-24
DE602005019581D1 (de) 2010-04-08
WO2006018787A2 (en) 2006-02-23
US8338228B2 (en) 2012-12-25
EP1782462A2 (de) 2007-05-09
CN101044610A (zh) 2007-09-26
WO2006018787A3 (en) 2006-08-17
JP2008511051A (ja) 2008-04-10
US20090215226A1 (en) 2009-08-27

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties