ATE410700T1 - Verfahren und vorrichtung zur bereitstellung eines optimierten zugangs zu schaltungen zum debuggen, programmieren und prüfen - Google Patents

Verfahren und vorrichtung zur bereitstellung eines optimierten zugangs zu schaltungen zum debuggen, programmieren und prüfen

Info

Publication number
ATE410700T1
ATE410700T1 AT01918854T AT01918854T ATE410700T1 AT E410700 T1 ATE410700 T1 AT E410700T1 AT 01918854 T AT01918854 T AT 01918854T AT 01918854 T AT01918854 T AT 01918854T AT E410700 T1 ATE410700 T1 AT E410700T1
Authority
AT
Austria
Prior art keywords
access interface
electronic circuit
programming
debugging
testing
Prior art date
Application number
AT01918854T
Other languages
English (en)
Inventor
Michael Ricchetti
Christopher Clark
Bulent Dervisoglu
Original Assignee
Intellitech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=26887206&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=ATE410700(T1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Intellitech Corp filed Critical Intellitech Corp
Application granted granted Critical
Publication of ATE410700T1 publication Critical patent/ATE410700T1/de

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318555—Control logic
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31705—Debugging aspects, e.g. using test circuits for debugging, using dedicated debugging test circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Debugging And Monitoring (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
AT01918854T 2000-03-23 2001-03-20 Verfahren und vorrichtung zur bereitstellung eines optimierten zugangs zu schaltungen zum debuggen, programmieren und prüfen ATE410700T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US19160200P 2000-03-23 2000-03-23
US09/716,583 US6594802B1 (en) 2000-03-23 2000-11-20 Method and apparatus for providing optimized access to circuits for debug, programming, and test

Publications (1)

Publication Number Publication Date
ATE410700T1 true ATE410700T1 (de) 2008-10-15

Family

ID=26887206

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01918854T ATE410700T1 (de) 2000-03-23 2001-03-20 Verfahren und vorrichtung zur bereitstellung eines optimierten zugangs zu schaltungen zum debuggen, programmieren und prüfen

Country Status (7)

Country Link
US (1) US6594802B1 (de)
EP (1) EP1275183B1 (de)
AT (1) ATE410700T1 (de)
AU (1) AU2001245878A1 (de)
CA (1) CA2404059C (de)
DE (1) DE60136059D1 (de)
WO (1) WO2001071876A1 (de)

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Also Published As

Publication number Publication date
WO2001071876A1 (en) 2001-09-27
EP1275183A1 (de) 2003-01-15
HK1052586A1 (en) 2003-09-19
DE60136059D1 (de) 2008-11-20
CA2404059C (en) 2004-06-01
EP1275183B1 (de) 2008-10-08
US6594802B1 (en) 2003-07-15
CA2404059A1 (en) 2001-09-27
AU2001245878A1 (en) 2001-10-03
EP1275183A4 (de) 2005-01-19

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